DS07-16301-4E Datasheet, PDF (91/99 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91101/MB91101A
(16) DMA Controller Timing
(VCC5 = 5.0 V ±10%, VSS = AVSS = 0.0 V, TA = –40°C to +70°C)
(VCC5 = VCC3 = 2.7 V to 3.6 V, VSS = AVSS = 0.0 V, TA = –40°C to +70°C)
Parameter
Symbol
Pin name
Condition
Value
Min
Max
Unit Remarks
DREQ input pulse width tDRWH DREQ0 to DREQ2
2 × tCYC
—
ns
DACK delay time
(Normal bus)
(Normal DRAM)
tCLDL
tCLDH
CLK,
DACK0 to DACK2
CLK,
DACK0 to DACK2
—
6
ns
—
6
ns
EOP delay time
(Normal bus)
(Normal DRAM)
tCLEL
tCLEH
CLK,
EOP0 to EOP2
CLK,
EOP0 to EOP2
—
6
ns
—
—
6
ns
DACK delay time
(Single DRAM)
(Hyper DRAM)
tCHDL
tCHDH
CLK,
DACK0 to DACK2
CLK,
DACK0 to DACK2
—
n/2 × tCYC ns
—
6
ns
EOP delay time
(Single DRAM)
(Hyper DRAM)
tCHEL
tCHEH
CLK,
EOP0 to EOP2
CLK,
EOP0 to EOP2
—
n/2 × tCYC ns
—
6
ns
tCYC (a cycle time of peripheral system clock): Refer to “(2) Clock Output Timing.”
CLK
DACK0 to DACK2
EOP0 to EOP2
(Normal bus)
(Normal DRAM)
DACK0 to DACK2
EOP0 to EOP2
(Single DRAM)
(Hyper DRAM)
DREQ0 to DREQ2
VOH
tCYC
VOL
VOH
tCLDL
tCLEL
VOL
VOL
tCLDH
tCLEH
VOH
tCHDL
tCHEL
VOL
VOH
tCHDH
tDRWH
VIH
VIH
91