DS07-16301-4E Datasheet, PDF (17/99 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91101/MB91101A
by inputting the reset procedure. (In this case, set the reset to “L” level within the oscillation stabilizing waiting
time.)
• Using STOP mode with 5 V power supply
5V
VCC5
VCC3
VSS
3.6 kΩ
0.1 µF
approx.
6.8 kΩ
11. Pin Condition at Turning on the Power Supply
The pin condition at turning on the power supply is unstable. The circuit starts being initialized after turning on
the power supply and then starting oscillation and then the operation of the internal regulator becomes stable.
So it takes about 42 ms for the pin to be initialized from the oscillation starting at the source oscillation 12.5 MHz.
Take care that the pin condition may be output condition at initial unstable condition.
(With the MB91101A, however, initalization can be achieved in less than about 42 ms after turning on the internal
power supply by maintaining the RST pin at "L" level.)
12. Source Oscillation Input at Turning on the Power Supply
At turning on the power supply, never fail to input the clock before cancellation of the oscillation stabilizing waiting.
13. Hardware Stand-by at Turning on the Power Supply
When turning on the power supply with the HST pin being set to “L” level, the hardware doesn’t stand by. However
the HST pin becomes available after the reset cancellation, the HST pin must once be back to “H” level.
14. Power on Reset
Make sure to make power on reset at turning on the power supply or returning on the power supply when the
power supply voltage is below the warranty range for normal operation.
15. Notes on during operation of PLL clock mode
If the PLL clock mode is selected, the microcontroller attempt to be working with the self oscillating circuit evevn
when there is no external oscillator or external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
16. Watchdog timer function
The watchdog timer supported by the FR family monitors the program that performs the reset delay operation
for a specified time. If the program hangs and the reset delay operation is not performed, the watchdog timer
resets the CPU. Therefore, once the watchdog timer is enabled, operation continues until the CPU is reset.
As an exception, a reset delay automatically occurs if the CPU stops program execution.
17