DS07-16301-4E Datasheet, PDF (8/99 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91101/MB91101A
Pin no.
LQFP*¹ QFP*²
1
4
2
5
3
6
16 to 18 19 to 21
92
95
91
94
14
17
13
16
12
15
95,
98,
94
97
89
92
Pin name
CS1L
PB5
DREQ2
CS1H
PB6
DACK2
DW1
PB7
MD0 to
MD2
X0
X1
RST
HST
NMI
INT0,
INT1
PE0,
PE1
INT2
SC1
PE2
Circuit
type
Description
CASL output for DRAM bank 1
Refer to the DRAM interface for details.
Can be configured as a port when CS1L and DREQ2 are not used.
F _{External transfer request input pin for DMA}
This pin is used for input when external trigger is selected to cause
DMAC operation, and it is necessary to disable output for other
functions from this pin unless such output is made intentionally.
CASH output for DRAM bank 1
Refer to the DRAM interface for details.
F ^{Can be configured as a port when CS1H and DACK2 are not used.}
External transfer request acknowledge output pin for DMAC (ch. 2)
This function is available when transfer request output for DMAC is
enabled.
WE output for DRAM bank 1 (“L” active)
F ^{Refer to the DRAM interface for details.}
Can be configured as a port when DW1 is not used.
Mode pins 0 to 2
G MCU basic operation mode is set by these pins.
Directly connect these pins with VCC or VSS for use.
A Clock (oscillator) input
A Clock (oscillator) output
B External reset input
H Hardware standby input (“L” active)
H NMI (non-maskable interrupt pin) input (“L” active)
External interrupt request input pins
These pins are used for input during corresponding interrupt is en-
abled, and it is necessary to disable output for other functions from
F _{these pins unless such output is made intentionally.}
Can be configured as I/O ports when INT0, INT1 are not used.
External interrupt request input pin
This pin is used for input during corresponding interrupt is enabled,
and it is necessary to disable output for other functions from this pin
unless such output is made intentionally.
F _{Clock I/O pin for UART1}
Clock output is available when clock output of UART1 is enabled.
Can be configured as the I/O port when INT2 and SC1 are not used.
This function is available when UART1 clock output is disabled.
*1: FPT-100P-M05
*2: FPT-100P-M06
(Continued)
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