DS07-16301-4E Datasheet, PDF (68/99 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller CMOS FR30 Series

MB91101/MB91101A
(1) Clock Timing Rating
Parameter
Clock frequency
Clock cycle time
Input clock pulse width
Input clock rising/falling time
Internal operating clock
frequency
Internal operating clock
cycle time
(VCC5 = 5.0 V ±10%, VSS = AVSS = 0.0 V, TA = –40°C to +70°C)
(VCC5 = VCC3 = 2.7 V to 3.6 V, VSS = AVSS = 0.0 V, TA = –40°C to +70°C)
Symbol
Pin
name
Condition
Value
Min
Max
Unit
Remarks
fC
X0, X1 When using PLL
10
12.5 MHz
fC
X0, X1
Self-oscillation
(divide-by-2 input)
10
25 MHz
fC
X0, X1
External clock
(divide-by-2 input)
10
25 MHz
tC
X0, X1 When using PLL
80
100
ns
tC
X0, X1
—
40
100
ns
PWH,
PWL
X0, X1
PWH,
PWL
X0, X1
—
Input to X0
25
—
ns
only, when
using 5 V
power supply
10
—
ns
Input to X0,
X1
tCR,
tCF
X0, X1
—
8
ns (tCR + tCF)
fCP
—
CPU system
0.625*¹ 50 MHz
fCPB
—
Bus system
0.625*¹ 25*² MHz
fCPP
—
Peripheral system 0.625*¹ 25 MHz
tCP
—
CPU system
20
1600*¹ ns
tCPB
—
Bus system
40*² 1600*¹ ns
tCPP
—
Peripheral system
40
1600*¹ ns
*1: These values are for a minimum clock of 10 MHz input to X0, a divide-by-2 system of the source oscillation and
a 1/8 gear.
*2: Values when using the doubler and CPU operation at 50 MHz.
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