MB81EDS516545_10 Datasheet, PDF (39/60 Pages) Fujitsu Component Limited. – 512M Bit (4 bank x 2M word x 64 bit) Consumer Applications Specific Memory for SiP

MB81EDS516545
(3) Read to Precharge *¹(Assuming CL = 4, BL = 8)
CK
CK
CKE H
CS
RAS
CAS
WE
BA
BA
BA
BA
BA
AP
RA
RA
Address _RA
CA
RA
SA
DM
BA
BA
CA
RDQS
WDQS
DQ
ACT
tRCD
tRAS
tRC
READ
CL = 4
Q0 Q1 Q2 Q3
CL = 4^*2
tRP
PRE^*2
ACT
tRCD
tRAS
READ
CL = 4
Q0 Q1
PRE
Don’t care
*1: RA = Row Address, BA = Bank Address, CA = Column Address, AP = Auto Precharge
*2: Burst read operation can be terminated by PRE command. All DQ pins become High-Z after CL from PRE
command.
DS05-11463-2E
39