MB85RS2MTPF-G Datasheet, PDF (20/28 Pages) Fujitsu Component Limited. – 2 M (256 K × 8) Bit SPI

MB85RS2MT
• C-V method of Latch-Up Resistance Test
Protection Resistance
A
Test
1 2 ^{terminal VDD}
SW
+
DUT
VIN
V
C
-
200pF
VSS
VDD
(Max.Rating)
Reference
terminal
Note : Charge voltage alternately switching 1 and 2 approximately 2 sec interval. This switching process is
considered as one cycle. Repeat this process 5 times. However, if the latch-up condition occurs before
completing 5times, this test must be stopped immediately.
20
DS501-00023-0v01-E