MC9S08QD4_07 Datasheet, PDF (97/202 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 8 Analog-to-Digital Converter (ADC10V1)
8.1.1.1 Channel Assignments
The ADC channel assignments for the MC9S08QD4 series devices are shown in Table 8-1. Reserved
channels convert to an unknown value.
Table 8-1. ADC Channel Assignment
ADCH Channel
Input
Pin Control
ADCH Channel
Input
Pin Control
00000
AD0
PTA0/ADC1P0
ADPC0
10000 AD16
V_SS
N/A
00001
AD1
PTA1/ADC1P1
ADPC1
10001 AD17
V_SS
N/A
00010
AD2
PTA2/ADC1P2
ADPC2
10010 AD18
V_SS
N/A
00011
AD3
PTA3/ADC1P3
ADPC3
10011 AD19
V_SS
N/A
00100
AD4
Vss
N/A
10100 AD20
V_SS
N/A
00101
AD5
Vss
N/A
10101 AD21
V_SS
N/A
00110
AD6
Vss
N/A
10110 AD22
Reserved
N/A
00111
AD7
Vss
N/A
10111 AD23
Reserved
N/A
01000
AD8
V_SS
N/A
11000 AD24
Reserved
N/A
01001
AD9
V_SS
N/A
11001 AD25
Reserved
N/A
01010 AD10
V_SS
N/A
11010 AD26
Temperature
N/A
Sensor¹
01011 AD11
V_SS
N/A
11011 AD27 Internal Bandgap²
N/A
01100 AD12
V_SS
N/A
11100 V_REFH
V_DD
N/A
01101 AD13
V_SS
N/A
11101 V_REFH
V_DD
N/A
01110 AD14
V_SS
N/A
11110 V_REFL
V_SS
N/A
01111 AD15
V_SS
N/A
11111 Module
None
N/A
Disabled
1 _{For information, see Section 8.1.1.5, “Temperature Sensor.”}
2 _{Requires BGBE =1 in SPMSC1 see Section 5.8.8, “System Power Management Status and Control 1 Register (SPMSC1).”}
For value of bandgap voltage reference see Appendix A.5, “DC Characteristics.”
8.1.1.2 Alternate Clock
The ADC is capable of performing conversions using the MCU bus clock, the bus clock divided by two,
or the local asynchronous clock (ADACK) within the module. The alternate clock, ALTCLK, input for the
MC9S08QD4 series MCU devices is not implemented.
8.1.1.3 Hardware Trigger
The ADC hardware trigger, ADHWT, is output from the real-time interrupt (RTI) counter. The RTI counter
can be clocked by either ICSERCLK or a nominal 32 kHz clock source within the RTI block.
The period of the RTI is determined by the input clock frequency and the RTIS bits. The RTI counter is a
free running counter that generates an overflow at the RTI rate determined by the RTIS bits. When the
ADC hardware trigger is enabled, a conversion is initiated upon a RTI counter overflow.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
97