MC9S08QD4_07 Datasheet, PDF (138/202 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 10 Keyboard Interrupt (S08KBIV2)
HCS08 CORE
CPU
BDC
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
COP
IRQ
LVD
USER FLASH
4096 / 2048 BYTES
USER RAM
256 / 128 BYTES
BKGD/MS
IRQ
4-BIT KEYBOARD
4
INTERRUPT MODULE (KBI)
1-CH 16-BIT TIMER/PWM
MODULE (TPM2)
2-CH 16-BIT TIMER/PWM
MODULE (TPM1)
TPM2CH0
TCLK2
TPM1CH0
TPM1CH1
TCLK1
10-BIT
ANALOG-TO-DIGITAL
4
CONVERTER (ADC)
PTA5/TPM2CH0I/IRQ/RESET
PTA4/TPM2CH0O/BKGD/MS
PTA3/KBI1P3/TCLK2/ADC1P3
PTA2/KBI1P2/TCLK1/ADC1P2
PTA1/KBI1P1/TPM1CH1/ADC1P1
PTA0/KBI1P0/TPM1CH0/ADC1P0
16 MHz INTERNAL CLOCK
SOURCE (ICS)
V_SS
V_DD
VOLTAGE REGULATOR
V_DDA
V_SSA
V_REFH
V_REFL
NOTES:
1 _{Port pins are software configurable with pullup device if input port.}
2 _{Port pins are software configurable for output drive strength.}
3 _{Port pins are software configurable for output slew rate control.}
4 _{IRQ contains a software configurable (IRQPDD) pullup/pulldown device if PTA5 enabled as IRQ pin function (IRQPE = 1).}
5 _{RESET contains integrated pullup device if PTA5 enabled as reset pin function (RSTPE = 1).}
6 _{PTA5 does not contain a clamp diode to VDD and must not be driven above VDD. The voltage measured on this pin when}
internal pullup is enabled may be as low as V_DD – 0.7 V. The internal gates connected to this pin are pulled to V_DD.
7 _{PTA4 contains integrated pullup device if BKGD enabled (BKGDPE = 1).}
8 _{When pin functions as KBI (KBIPEn = 1) and associated pin is configured to enable the pullup device, KBEDGn can be used}
to reconfigure the pullup as a pulldown device.
Figure 10-1. MC9S08QD4 Series Block Diagram Highlighting KBI Block and Pins
MC9S08QD4 Series MCU Data Sheet, Rev. 3
138
Freescale Semiconductor