MC9S08QD4_07 Datasheet, PDF (147/202 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Timer/Pulse-Width Modulator (S08TPMV2)
11.1.3 Features
The TPM has the following features:
• Each TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on all
channels
• Clock sources independently selectable per TPM (multiple TPMs device)
• Selectable clock sources (device dependent): bus clock, fixed system clock, external pin
• Clock prescaler taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128
• 16-bit free-running or up/down (CPWM) count operation
• 16-bit modulus register to control counter range
• Timer system enable
• One interrupt per channel plus a terminal count interrupt for each TPM module (multiple TPMs
device)
• Channel features:
— Each channel may be input capture, output compare, or buffered edge-aligned PWM
— Rising-edge, falling-edge, or any-edge input capture trigger
— Set, clear, or toggle output compare action
— Selectable polarity on PWM outputs
11.1.4 Block Diagram
Figure 11-2 shows the structure of a TPM. Some MCUs include more than one TPM, with various
numbers of channels.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
147