MC9S08QD4_07 Datasheet, PDF (37/202 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 4 Memory Map and Register Definition
Table 4-3. High-Page Register Summary
Address Register Name Bit 7
6
0x1800 SRS
POR
PIN
0x1801 SBDFR
0
0
0x1802 SOPT1
COPE COPT
0x1803 SOPT2
COPCLKS
0
0x1804 Reserved
—
—
0x1805 Reserved
—
—
0x1806 SDIDH
REV3
REV2
0x1807 SDIDL
ID7
ID6
0x1808 SRTISC
RTIF RTIACK
0x1809 SPMSC1
LVDF LVDACK
0x180A SPMSC2
LVWF LVWACK
0x180B–
0x181F
Reserved
—
—
—
—
0x1820 FCDIV
DIVLD PRDIV8
0x1821 FOPT
KEYEN FNORED
0x1822 Reserved
—
—
0x1823 FCNFG
0
0
0x1824 FPROT
0x1825 FSTAT
FCBEF FCCF
0x1826 FCMD
0x1827–
0x183F
Reserved
—
—
—
—
0x1840 PTAPE
0
0
0x1841 PTASE
0
0
0x1842 PTADS
0
0
0x1843–
0x1847
Reserved
—
—
—
—
1 _{This reserved bit must always be written to 0.}
5
COP
0
STOPE
0
—
—
REV1
ID5
RTICLKS
LVDIE
LVDV
—
—
0
—
KEYACC
FPVIOL
—
—
PTAPE5
PTASE5
PTADS5
—
—
4
3
2
ILOP
ILAD
0
0
0
0
0
0
0
0
0
0
—
—
—
—
—
—
REV0
ID11
ID10
ID4
ID3
ID2
RTIE
0
LVDRE LVDSE LVDE
LVWV
PPDF PPDACK
—
—
—
—
—
—
DIV
0
0
0
—
—
—
0
0
0
FPS
FACCERR
0
FBLANK
FCMD
—
—
—
—
—
—
PTAPE4 PTAPE3 PTAPE2
PTASE4 PTASE3 PTASE2
PTADS4 PTADS3 PTADS2
—
—
—
—
—
—
1
LVD
0
BKGDPE
0
—
—
ID9
ID1
RTIS
0¹
—
—
—
SEC01
—
0
0
—
—
PTAPE1
PTASE1
PTADS1
—
—
Bit 0
0
BDFR
RSTPE
0
—
—
ID8
ID0
BGBE
PPDC
—
—
SEC00
—
0
FPDIS
0
—
—
PTAPE0
PTASE0
PTADS0
—
—
Nonvolatile flash registers, shown in Table 4-4, are located in the flash memory. These registers include
an 8-byte backdoor key that optionally can be used to gain access to secure memory resources. During
reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the flash memory
are transferred into corresponding FPROT and FOPT working registers in the high-page registers to
control security and block protection options.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
37