MC9S08QD4_07 Datasheet, PDF (65/202 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Chapter 5 Resets, Interrupts, and General System Control
7
6
5
4
3
2
1
0
R
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
W
Reset:
0
0
0
0
1
0
0
1
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
Field
7:0
ID[7:0]
Table 5-9. SDIDL Register Field Descriptions
Description
Part Identification Number — Each derivative in the HCS08 family has a unique identification number. The
MC9S08QD4 series is hard coded to the value 0x011. See also ID bits in Table 5-8.
5.8.7 System Real-Time Interrupt Status and Control Register (SRTISC)
This high-page register contains status and control bits for the RTI.
7
6
5
4
3
R RTIF
0
0
RTICLKS
RTIE
W
RTIACK
2
1
0
RTIS
Reset:
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 5-9. System RTI Status and Control Register (SRTISC)
Table 5-10. SRTISC Register Field Descriptions
Field
Description
7
RTIF
6
RTIACK
5
RTICLKS
4
RTIE
2:0
RTIS
Real-Time Interrupt Flag — This read-only status bit indicates the periodic wakeup timer has timed out.
0 Periodic wakeup timer not timed out.
1 Periodic wakeup timer timed out.
Real-Time Interrupt Acknowledge — This write-only bit is used to acknowledge real-time interrupt request
(write 1 to clear RTIF). Writing 0 has no meaning or effect. Reads always return 0.
Real-Time Interrupt Clock Select — This read/write bit selects the clock source for the real-time interrupt.
0 Real-time interrupt request clock source is internal 1 kHz oscillator.
1 Real-time interrupt request clock source is 32 kHz ICS clock.
Real-Time Interrupt Enable — This read-write bit enables real-time interrupts.
0 Real-time interrupts disabled.
1 Real-time interrupts enabled.
Real-Time Interrupt Delay Selects — These read/write bits select the period for the RTI. See Table 5-11
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
65