MC9S12K Datasheet, PDF (9/126 Pages) Freescale Semiconductor, Inc – Microcontrollers

List of Figures
Device User Guide — 9S12KT256DGV1/D V01.09
Figure 0-1
Figure 1-1
Figure 1-2
Figure 1-3
Figure 1-4
Figure 1-5
Figure 1-6
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 2-5
Figure 2-6
Figure 2-7
Figure 3-1
Figure A-1
Figure A-2
Figure A-3
Figure A-4
Figure A-5
Figure A-6
Figure A-7
Figure A-8
Figure A-9
Figure B-1
Figure B-2
Figure B-3
Order Part number Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
MC9S12KG(L)(C)128(64)(32) Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 19
MC9S12KT(G)256 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
MC9S12KT256 and MC9S12KG256 Memory Map . . . . . . . . . . . . . . . . . . . . 23
MC9S12KG128, MC9S12KL128 and MC9S12KC128 Memory Map . . . . . . 24
MC9S12KG64, MC9S12KL64 and MC9S12KC64 Memory Map . . . . . . . . . 25
MC9S12KG32 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Pin assignments for 112 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Pin assignments for 100 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Pin assignments for 80 QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Loop Controlled Pierce Oscillator Connections (PE7=1) . . . . . . . . . . . . . . . . 62
Full Swing Pierce Oscillator Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . 63
External Clock Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Voltage Regulator - Chip Power-up and Voltage Drops (not scaled) . . . . . 95
ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Jitter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
SPI Slave Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
80-pin QFP Mechanical Dimensions (case no. 841B) . . . . . . . . . . . . . . . . 122
100-pin LQFP Mechanical Dimensions (case no. 983) . . . . . . . . . . . . . . . 123
112-pin LQFP Mechanical Dimensions (case no. 987) . . . . . . . . . . . . . . . 124
Freescale Semiconductor
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