MC9S12K Datasheet, PDF (118/126 Pages) Freescale Semiconductor, Inc – Microcontrollers

Device User Guide — 9S12KT256DGV1/D V01.09
Table A-24 Expanded Bus Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted, C_LOAD = 50pF
Num C
Rating
Symbol
1 P Frequency of operation (E-clock)
f_o
2 P Cycle time
t_cyc
3 D Pulse width, E low
PW_EL
4 D _{Pulse width, E high}¹
PW_EH
5 D Address delay time
t_AD
6 D Address valid time to E rise (PW_EL–t_AD)
t_AV
7 D Muxed address hold time
t_MAH
8 D Address hold to data valid
t_AHDS
9 D Data hold to address
t_DHA
10 D Read data setup time
t_DSR
11 D Read data hold time
t_DHR
12 D Write data delay time
t_DDW
13 D Write data hold time
t_DHW
14 D Write data setup time⁽¹⁾ (PW_EH–t_DDW)
t_DSW
15 D Address access time⁽¹⁾ (t_cyc–t_AD–t_DSR)
t_ACCA
16 D E high access time⁽¹⁾ (PW_EH–t_DSR)
t_ACCE
17 D Non-multiplexed address delay time
t_NAD
18 D Non-muxed address valid to E rise (PW_EL–t_NAD)
19 D Non-multiplexed address hold time
t_NAV
t_NAH
20 D Chip select delay time
t_CSD
21 D Chip select access time⁽¹⁾ (t_cyc–t_CSD–t_DSR)
t_ACCS
22 D Chip select hold time
t_CSH
23 D Chip select negated time
t_CSN
24 D Read/write delay time
t_RWD
25 D Read/write valid time to E rise (PW_EL–t_RWD)
t_RWV
26 D Read/write hold time
t_RWH
27 D Low strobe delay time
t_LSD
28 D Low strobe valid time to E rise (PW_EL–t_LSD)
t_LSV
29 D Low strobe hold time
t_LSH
30 D NOACC strobe delay time
t_NOD
31 D NOACC valid time to E rise (PW_EL–t_LSD)
t_NOV
Min
0
40
17
17
11
2
7
2
13
0
2
10
19
4
10
2
11
2
8
10
2
10
2
10
Typ
Max
25.0
8
7
7
16
7
7
7
Unit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
118
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