MC9S12K Datasheet, PDF (110/126 Pages) Freescale Semiconductor, Inc – Microcontrollers

Device User Guide — 9S12KT256DGV1/D V01.09
Table A-20 PLL Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol Min
Typ
Max Unit
1 P Self Clock Mode frequency
f_SCM
1
5.5
MHz
2 D VCO locking range
f_VCO
8
50
MHz
3
D
Lock Detector transition from Acquisition to Tracking
mode
∆_trk
3%
4%¹
—
4 D Lock Detection
∆_Lock
0%
1.5%⁽¹⁾
—
5 D Un-Lock Detection
∆_unl
0.5%
2.5%⁽¹⁾
—
6
D
Lock Detector transition from Tracking to Acquisition
mode
∆_unt
6%
8%⁽¹⁾
—
7 C _{PLLON Total Stabilization delay}²
t_stab
0.5
ms
8 D _{PLLON Acquisition mode stabilization delay}⁽²⁾
t_acq
0.3
ms
9 D _{PLLON Tracking mode stabilization delay}⁽²⁾
t_al
0.2
ms
10 D Fitting parameter VCO loop gain
K₁
-100
MHz/V
11 D Fitting parameter VCO loop frequency
f₁
60
MHz
12 D Charge pump current acquisition mode
i_ch
-38.5
µA
13 D Charge pump current tracking mode
i_ch
-3.5
µA
14 C _{Jitter fit parameter 1}⁽²⁾
j₁
1.1
%
15 C _{Jitter fit parameter 2}⁽²⁾
j₂
0.13
%
NOTES:
1. % deviation from target frequency
2. f_OSC = 4MHz, f_BUS = 25MHz equivalent f_VCO = 50MHz: REFDV = #$03, SYNR = #$018, Cs = 4.7nF, Cp = 470pF, Rs =
10KΩ.
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Freescale Semiconductor