MC9S12K Datasheet, PDF (71/126 Pages) Freescale Semiconductor, Inc – Microcontrollers

Device User Guide — 9S12KT256DGV1/D V01.09
Section 3 System Clock Description
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block Guide for
details on clock generation.
Core Clock
HCS12 CORE
BDM CPU
MEBI MMC
INT DBG
EXTAL
OSC CRG ^{Bus Clock}
XTAL
Oscillator Clock
Flash
RAM
EEPROM
TIM
ATD
PWM
SCI0, SCI1
SPI0, SPI1, SPI2
CAN0, CAN1, CAN4
IIC
PIM
Figure 3-1 Clock Connections
Freescale Semiconductor
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