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PXS20 Datasheet, PDF (75/119 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Electrical characteristics
Table 9. Recommended operating conditions (3.3 V) (continued)
Symbol
Parameter
Conditions Min
Max1 Unit
VSS_LV_REGCOR4 SR Internal reference voltage
VDD_LV_CORx2 SR Internal supply voltage
VSS_LV_CORx3 SR Internal reference voltage
VDD_LV_PLL2 SR Internal supply voltage
VSS_LV_PLL3 SR Internal reference voltage
—
0
0
V
—
—
—
V
—
0
0
V
—
—
—
V
—
0
0
V
TA
SR Ambient temperature under bias
fCPU  120 MHz –40
125 °C
TJ
SR Junction temperature under bias
—
–40
150 °C
1 Full functionality cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical characteristics
and I/Os DC electrical specification may not be guaranteed.
2 VDD_HV_ADR0 and VDD_HV_ADR1 cannot be operated at different voltages, and need to be supplied by the same
voltage source.
3 Can be connected to emitter of external NPN. Low voltage supplies are not under user control. They are produced
by an on-chip voltage regulator.
4 For the device to function properly, the low voltage grounds (VSS_LV_xxx) must be shorted to high voltage grounds
(VSS_HV_xxx) and the low voltage supply pins (VDD_LV_xxx) must be connected to the external ballast emitter, if one
is used.
3.4 Thermal characteristics
Table 10. Thermal characteristics for 144 LQFP package1
Symbol
Parameter
Conditions
Value Unit
RJA
D Thermal resistance, junction-to-ambient natural Single layer board – 1s
convection2
Four layer board – 2s2p
42 °C/W
34
RJMA D Thermal resistance, junction-to-ambient forced Single layer board – 1s
convection at 200 ft/min
Four layer board – 2s2p
34 °C/W
28
RJB D Thermal resistance junction-to-board3
—
22 °C/W
RJC D Thermal resistance junction-to-case4
—
8 °C/W
JT D Junction-to-package-top natural convection5
—
3 °C/W
1 Thermal characteristics are targets based on simulation that are subject to change per device characterization.
2 Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board
meets JEDEC specification for this package.
3 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC
specification for the specified package.
4 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate
temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer.
5 Thermal characterization parameter indicating the temperature difference between the package top and the
junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization
parameter is written as Psi-JT.
PXS20 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
75
Preliminary—Subject to Change Without Notice