PXS20 Datasheet, PDF (108/119 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Electrical characteristics
IRQ
1
2
3
Figure 29. External interrupt timing
3.20.6 DSPI timing
Table 37. DSPI timing
No. Symbol
Parameter
1 t_SCK D DSPI cycle time
D
D
2 t_CSC D PCS to SCK delay
3 t_ASC D After SCK delay
4 t_SDC D SCK duty cycle
5 t_A D Slave access time
6 t_DIS D Slave SOUT disable time
7 t_PCSC D PCSx to PCSS time
8 t_PASC D PCSS to PCSx time
9 t_SUI D Data setup time for inputs
10 t_HI D Data hold time for inputs
11 t_SUO D Data valid (after SCK edge)
Conditions
Min
Max Unit
Master (MTFE = 0)
62
—
ns
Slave (MTFE = 0)
Slave Receive Only Mode¹
62
—
16
—
—
16
—
ns
—
16
—
ns
—
SS active to SOUT valid
t_SCK/2 - 10 t_SCK/2 + 10 ns
—
40
ns
SS inactive to SOUT High-Z or invalid —
10
ns
—
13
—
ns
—
13
—
ns
Master (MTFE = 0)
20
—
ns
Slave
2
—
Master (MTFE = 1, CPHA = 0)
5
—
Master (MTFE = 1, CPHA = 1)
20
—
Master (MTFE = 0)
–5
—
ns
Slave
4
—
Master (MTFE = 1, CPHA = 0)
11
—
Master (MTFE = 1, CPHA = 1)
–5
—
Master (MTFE = 0)
—
4
ns
Slave
—
23
Master (MTFE = 1, CPHA = 0)
—
12
Master (MTFE = 1, CPHA = 1)
—
4
PXS20 Microcontroller Data Sheet, Rev. 1
108
Freescale Semiconductor
Preliminary—Subject to Change Without Notice