MC9S12DP512CPVE Datasheet, PDF(74/124 Page) Freescale Semiconductor, Inc

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MC9S12DP512CPVE Datasheet, PDF (74/124 Pages) Freescale Semiconductor, Inc – MC9S12DP512 Device Guide V01.25

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MC9S12DP512 Device Guide V01.25

$FFCA, $FFCB

Modulus Down Counter underï¬ow

I-Bit

MCCTL (MCZI)

$CA

$FFC8, $FFC9

Pulse Accumulator B Overï¬ow

I-Bit

PBCTL (PBOVI)

$C8

$FFC6, $FFC7

CRG PLL lock

I-Bit

CRGINT (LOCKIE)

$C6

$FFC4, $FFC5

CRG Self Clock Mode

I-Bit

CRGINT (SCMIE)

$C4

$FFC2, $FFC3

BDLC

I-Bit

DLCBCR1 (IE)

$C2

$FFC0, $FFC1

IIC Bus

I-Bit

IBCR (IBIE)

$C0

$FFBE, $FFBF

SPI1

I-Bit

SPICR1 (SPIE, SPTIE)

$BE

$FFBC, $FFBD

SPI2

I-Bit

SPICR1 (SPIE, SPTIE)

$BC

$FFBA, $FFBB

EEPROM

I-Bit

ECNFG (CCIE, CBEIE)

$BA

$FFB8, $FFB9

FLASH

I-Bit

FCNFG (CCIE, CBEIE)

$B8

$FFB6, $FFB7

CAN0 wake-up

I-Bit

CANRIER (WUPIE)

$B6

$FFB4, $FFB5

CAN0 errors

I-Bit CANRIER (CSCIE, OVRIE)

$B4

$FFB2, $FFB3

CAN0 receive

I-Bit

CANRIER (RXFIE)

$B2

$FFB0, $FFB1

CAN0 transmit

I-Bit CANTIER (TXEIE2-TXEIE0)

$B0

$FFAE, $FFAF

CAN1 wake-up

I-Bit

CANRIER (WUPIE)

$AE

$FFAC, $FFAD

CAN1 errors

I-Bit CANRIER (CSCIE, OVRIE)

$AC

$FFAA, $FFAB

CAN1 receive

I-Bit

CANRIER (RXFIE)

$AA

$FFA8, $FFA9

CAN1 transmit

I-Bit CANTIER (TXEIE2-TXEIE0)

$A8

$FFA6, $FFA7

CAN2 wake-up

I-Bit

CANRIER (WUPIE)

$A6

$FFA4, $FFA5

CAN2 errors

I-Bit CANRIER (CSCIE, OVRIE)

$A4

$FFA2, $FFA3

CAN2 receive

I-Bit

CANRIER (RXFIE)

$A2

$FFA0, $FFA1

CAN2 transmit

I-Bit CANTIER (TXEIE2-TXEIE0)

$A0

$FF9E, $FF9F

CAN3 wake-up

I-Bit

CANRIER (WUPIE)

$9E

$FF9C, $FF9D

CAN3 errors

I-Bit CANRIER (CSCIE, OVRIE)

$9C

$FF9A, $FF9B

CAN3 receive

I-Bit

CANRIER (RXFIE)

$9A

$FF98, $FF99

CAN3 transmit

I-Bit CANTIER (TXEIE2-TXEIE0)

$98

$FF96, $FF97

CAN4 wake-up

I-Bit

CANRIER (WUPIE)

$96

$FF94, $FF95

CAN4 errors

I-Bit CANRIER (CSCIE, OVRIE)

$94

$FF92, $FF93

CAN4 receive

I-Bit

CANRIER (RXFIE)

$92

$FF90, $FF91

CAN4 transmit

I-Bit CANTIER (TXEIE2-TXEIE0)

$90

$FF8E, $FF8F

Port P Interrupt

I-Bit

PIEP (PIEP7-0)

$8E

$FF8C, $FF8D

PWM Emergency Shutdown

I-Bit

PWMSDN (PWMIE)

$8C

$FF80 to

$FF8B

Reserved

5.3 Effects of Reset

When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the

respective module Block Guides for register reset states.

5.3.1 I/O pins

Refer to the HCS12 Multiplexed External Bus Interface (MEBI) Block Guide for mode dependent pin

configuration of port A, B, E and K out of reset.

Refer to the PIM Block Guide for reset configurations of all peripheral module ports.

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