MC9S12DP512CPVE Datasheet, PDF (58/124 Pages) Freescale Semiconductor, Inc – MC9S12DP512 Device Guide V01.25

MC9S12DP512 Device Guide V01.25
EXTAL
MCU
XTAL
R_B
R_S*
C₁
Crystal or
ceramic resonator
C₂
VSSPLL
* Rs can be zero (shorted) when used with higher frequency crystals.
Refer to manufacturer’s data.
Figure 2-4 Pierce Oscillator Connections (PE7=0)
EXTAL
MCU
XTAL
CMOS-COMPATIBLE
EXTERNAL OSCILLATOR
(VDDPLL-Level)
not connected
Figure 2-5 External Clock Connections (PE7=0)
2.3.14 PE6 / MODB / IPIPE1 — Port E I/O Pin 6
PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE1. This pin is an input with a pull-down device which is only active
when RESET is low.
2.3.15 PE5 / MODA / IPIPE0 — Port E I/O Pin 5
PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE0. This pin is an input with a pull-down device which is only active
when RESET is low.
2.3.16 PE4 / ECLK — Port E I/O Pin 4
PE4 is a general purpose input or output pin. It can be configured to drive the internal bus clock ECLK.
ECLK can be used as a timing reference.