MC9S12DP512CPVE Datasheet, PDF (29/124 Pages) Freescale Semiconductor, Inc – MC9S12DP512 Device Guide V01.25

MC9S12DP512 Device Guide V01.25
$0028 - $002F
BKP (HCS12 Breakpoint)
Address
$0028
$0029
$002A
$002B
$002C
$002D
$002E
$002F
Name
BKPCT0
BKPCT1
BKP0X
BKP0H
BKP0L
BKP1X
BKP1H
BKP1L
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Read: _{BKEN BKFULL BKBDM BKTAG}
0
Write:
Read:
Write: ^{BK0MBH BK0MBL BK1MBH BK1MBL BK0RWE}
Read: 0
Write:
0
BK0V5 BK0V4 BK0V3
Read: _{Bit 15}
14
13
12
11
Write:
Read:
Write: ^{Bit 7}
6
5
4
3
Read: 0
Write:
0
BK1V5 BK1V4 BK1V3
Read: _{Bit 15}
14
13
12
11
Write:
Read:
Write: ^{Bit 7}
6
5
4
3
Bit 2
0
BK0RW
BK0V2
10
2
BK1V2
10
2
Bit 1
0
BK1RWE
BK0V1
9
1
BK1V1
9
1
Bit 0
0
BK1RW
BK0V0
Bit 8
Bit 0
BK1V0
Bit 8
Bit 0
$0030 - $0031
MMC map 4 of 4 (HCS12 Module Mapping Control)
Address
$0030
$0031
Name
PPAGE
Reserved
Read:
Write:
Read:
Write:
Bit 7
0
0
Bit 6
0
0
Bit 5
PIX5
0
Bit 4
PIX4
0
Bit 3
PIX3
0
Bit 2
PIX2
0
Bit 1
PIX1
0
Bit 0
PIX0
0
$0032 - $0033
MEBI map 3 of 3 (HCS12 Multiplexed External Bus Interface)
Address
$0032
$0033
Name
PORTK
DDRK
Read:
Write:
Read:
Write:
Bit 7
Bit 7
Bit 7
Bit 6
6
6
Bit 5
5
5
Bit 4
4
4
Bit 3
3
3
Bit 2
2
2
Bit 1
1
1
Bit 0
Bit 0
Bit 0
$0034 - $003F
CRG (Clock and Reset Generator)
Address
$0034
$0035
$0036
$0037
$0038
Name
SYNR
REFDV
CTFLG
Test Only
CRGFLG
CRGINT
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Bit 7
0
0
TOUT7
RTIF
RTIE
Bit 6
0
0
TOUT6
PROF
0
Bit 5
SYN5
0
TOUT5
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SYN4 SYN3 SYN2 SYN1 SYN0
0
REFDV3 REFDV2 REFDV1 REFDV0
TOUT4 TOUT3 TOUT2 TOUT1 TOUT0
LOCKIF
LOCKIE
LOCK
0
TRACK
0
SCMIF
SCMIE
SCM
0
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