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33912 Datasheet, PDF (7/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 5.5V ≤ VSUP ≤ 18V, -40°C ≤ TA ≤ 125°C for the 33912 and -40°C ≤ TA ≤ 85°C for the
34912, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
SUPPLY VOLTAGE RANGE (VS1, VS2)
Symbol
Min
Typ
Max
Unit
Nominal Operating Voltage
VSUP
5.5
–
18
V
Functional Operating Voltage(16)
VSUPOP
–
–
27
V
Load Dump
VSUPLD
–
–
40
V
SUPPLY CURRENT RANGE (VSUP = 13.5V)
Normal Mode (IOUT at VDD = 10mA), LIN Recessive State(17)
Stop Mode, VDD ON with IOUT = 100µA, LIN Recessive State(17), (18), (19)
5.5V < VSUP < 12V
VSUP = 13.5V
IRUN
ISTOP
–
4.5
10
mA
µA
–
48
80
–
58
90
Sleep Mode, VDD OFF, LIN Recessive State(17), (19)
5.5V < VSUP < 12V
12V ≤ VSUP < 13.5V
ISLEEP
µA
–
27
35
–
37
48
Cyclic Sense Supply Current Adder(20)
ICYCLIC
–
10
–
µA
SUPPLY UNDER/OVER VOLTAGE DETECTIONS
Power-On Reset (BATFAIL)(21)
Threshold (measured on VS1)(20)
Hysteresis (measured on VS1)(20)
V
VBATFAIL
1.5
3.0
3.9
VBATFAIL_HYS
–
0.9
–
Vsup under voltage detection (VSUV Flag) (Normal and Normal Request
Modes, Interrupt Generated)
V
Threshold (measured on VS1)
Hysteresis (measured on VS1)
VSUV
5.55
6.0
6.6
VSUV_HYS
–
1.0
–
Vsup over voltage detection (VSOV Flag) (Normal and Normal Request
Modes, Interrupt Generated)
Threshold (measured on VS1)
Hysteresis (measured on VS1)
V
VSOV
18
19.25
20.5
VSOV_HYS
–
1.0
–
Notes
16. Device is fully functional. All features are operating.
17. Total current (IVS1 + IVS2) measured at GND pins excluding all loads, cyclic sense disabled.
18. Total IDD current (including loads) below 100µA.
19. Stop and Sleep Modes current will increase if VSUP exceeds13.5V.
20. This parameter is guaranteed by process monitoring but not production tested.
21. The Flag is set during power up sequence. To clear the flag, a SPI read must be performed.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33912
7