33912 Datasheet, PDF (39/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current

FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
High Side Control Register - HSCR
This register controls the operation of the high side drivers.
Writing to this register returns the High Side Status Register
(HSSR).
Table 17. High Side Control Register - $6
C3
C2
C1
C0
Write PWMHS2 PWMHS1
HS2
HS1
Reset
Value
0
0
0
0
Reset
Condition
POR
POR, Reset Mode, ext_reset, HSx
over-temp or (VSOV & HVSE)
PWMHSx - PWM Input Control Enable.
This write-only bit enables/disables the PWMIN input pin
to control the respective high side switch. The corresponding
high side switch must be enabled (HSx bit).
1 = PWMIN input controls HSx output.
0 = HSx is controlled only by SPI.
HSx - HSx Switch Control.
This write-only bit enables/disables the corresponding
high side switch.
1 = HSx switch on.
0 = HSx switch off.
High Side Status Register - HSSR
This register returns the status of the high side switches
and is also returned when writing to the HSCR.
Table 18. High Side Status Register - $6/$7
S3
S2
S1
S0
Read HS2OP HS2CL HS1OP HS1CL
High Side thermal shutdown
A thermal shutdown of the high side drivers is indicated by
setting all HSxOP and HSxCL bits simultaneously.
HSxOP - High Side Switch Open-Load Detection
This read-only bit signals that the high side switches are
conducting current below a certain threshold indicating
possible load disconnection.
1 = HSx Open Load detected (or thermal shutdown)
0 = Normal
HSxCL - High Side Current Limitation
This read-only bit indicates that the respective high side
switch is operating in current limitation mode.
1 = HSx in current limitation (or thermal shutdown)
0 = Normal
Low Side Control Register - LSCR
This register controls the operation of the low side drivers.
Writing the Low Side Control Register (LSCR) will also return
the Low Side Status Register (LSSR).
Table 19. Low Side Control Register - $8
C3
C2
C1
C0
Write PWMLS2 PWMLS1
LS2
LS1
Reset
Value
0
0
0
0
Reset
Condition
POR
POR, Reset Mode, ext_reset, LSx
over-temp or (VSOV & HVSE)
PWMLx - PWM input control enable.
This write-only bit enables/disables the PWMIN input pin
to control the respective low side switch. The corresponding
low side switch must be enabled (LSx bit).
1 = PWMIN input controls LSx.
0 = LSx is controlled only by SPI.
LSx - LSx switch control.
This write-only bit enables/disables the corresponding low
side switch.
1 = LSx switch on.
0 = LSx switch off.
Low Side Status Register - LSSR
This register returns the status of the low side switches
and is also returned when writing to the LSCR.
Table 20. Low Side Status Register - $8/$9
C3
C2
C1
C0
Read LS2OP LS2CL LS1OP LS1CL
Low Side thermal shutdown
A thermal shutdown of the low side drivers is indicated by
setting all LSxOP and LSxCL bits simultaneously.
LSxOP - Low Side Switch Open-Load Detection
This read-only bit signals that the low side switches are
conducting current below a certain threshold indicating
possible load disconnection.
1 = LSx Open Load detected (or thermal shutdown)
0 = Normal
LSxCL - Low Side Current Limitation
This read-only bit indicates that the respective low side
switch is operating in current limitation mode.
1 = LSx in current limitation (or thermal shutdown)
0 = Normal
Analog Integrated Circuit Device Data
Freescale Semiconductor
33912
39