33912 Datasheet, PDF (16/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 5.5V ≤ V_SUP ≤ 18V, -40°C ≤ T_A ≤ 125°C for the 33912 and -40°C ≤ T_A ≤ 85°C for the
34912, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T_A = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR FAST SLEW RATE
LIN Fast Slew Rate (Programming Mode)
SR_FAST
—
LIN PHYSICAL LAYER: CHARACTERISTICS AND WAKE-UP TIMINGS⁽⁴⁹⁾
Propagation Delay and Symmetry⁽⁵⁰⁾
Propagation Delay Receiver, t_{REC_PD}=MAX (t_{REC_PDR}, t_{REC_PDF})
Symmetry of Receiver Propagation Delay t_{REC_PDF} - t_{REC_PDR}
t _{REC_PD}
t _{REC_SYM}
—
- 2.0
Bus Wake-Up Deglitcher (Sleep and Stop Modes)⁽⁵¹⁾
t _PROPWL
42
Bus Wake-Up Event Reported
From Sleep Mode⁽⁵²⁾
From Stop Mode⁽⁵³⁾
t _WAKE
—
t _WAKE
9.0
20
—
V / µs
µs
3.0
6.0
—
2.0
70
95
µs
µs
—
1500
13
17
TXD Permanent Dominant State Delay
PULSE WIDTH MODULATION INPUT PIN (PWMIN)
PWMIN pin⁽⁵⁴⁾
Max. frequency to drive HS and LS output pins
t _TXDDOM
0.65
1.0
1.35
s
f_PWMIN
kHz
10
Notes
49. V_SUP from 7.0V to 18V, bus load R_BUS and C_BUS 1.0nF / 1.0kΩ, 6.8nF / 660Ω, 10nF / 500Ω. Measurement thresholds: 50% of TXD
signal to LIN signal threshold defined at each parameter. See Figure 6, page 18.
50. See Figure 9, page 19
51. See Figure 10, page 19 for Sleep and Figure 11, page 19 for Stop Mode.
52. The measurement is done with 1µF capacitor and 0mA current load on V_DD. The value takes into account the delay to charge the
capacitor. The delay is measured between the bus wake-up threshold (V_BUSWU) rising edge of the LIN bus and when V_DD reaches 3.0V.
See Figure 10, page 19. The delay depends of the load and capacitor on V_DD.
53. In Stop Mode, the delay is measured between the bus wake-up threshold (V_BUSWU) and the falling edge of the IRQ pin. See Figure 11,
page 19.
54. This parameter is guaranteed by process monitoring but not production tested.
33912
16
Analog Integrated Circuit Device Data
Freescale Semiconductor