33912 Datasheet, PDF (41/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current

FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
WDERR - Watchdog Error
This read-only bit signals the detection of a missing
watchdog resistor. In this condition the watchdog is using the
internal, lower precision timebase. The Windowing function is
disabled.
1 = WDCONF pin resistor missing
0 = WDCONF pin resistor not floating
WDOFF - Watchdog Off
This read-only bit signals that the watchdog pin connected
to Ground and therefore disabled. In this case watchdog
timeouts are disabled and the device automatically enters
Normal Mode out of Reset. This might be necessary for
software debugging and for programming the Flash memory.
1 = Watchdog is disabled
0 = Watchdog is enabled
WDWO - Watchdog Window Open
This read-only bit signals when the watchdog window is
open for clears. The purpose of this bit is for testing. Should
be ignored in case WDERR is High.
1 = Watchdog window open
0 = Watchdog window closed
Analog Multiplexer Control Register - MUXCR
This register controls the analog multiplexer and selects
the divider ration for the Lx input divider.
Table 25. Analog Multiplexer Control Register -$C
C3
C2
C1
C0
Write
LXDS
MX2
MX1
MX0
Reset
Value
1
0
0
0
Reset
Condition
POR
POR, Reset Mode or ext_reset
LXDS - Lx Analog Input Divider Select
This write-only bit selects the resistor divider for the Lx
analog inputs. Voltage is internally clamped to VDD.
0 = Lx Analog divider: 1
1 = Lx Analog divider: 3.6 (typ.)
MXx - Analog Multiplexer Input Select
These write-only bits selects which analog input is
multiplexed to the ADOUT0 pin according to Table 26.
When disabled or when in Stop or Sleep Mode, the output
buffer is not powered and the ADOUT0 output is left floating
to achieve lower current consumption.
Table 26. Analog Multiplexer Channel Select
MX2
MX1
MX0
Meaning
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Disabled
Reserved
Die Temperature Sensor
VSENSE input
L1 input
L2 input
L3 input
L4 input
Configuration Register - CFR
This register controls the Hall Sensor Supply enable/
disable, the cyclic sense timing multiplier, enables/disables
the Current Sense Auto-zero function and selects the gain for
the current sense amplifier.
Table 27. Configuration Register - $D
C3
C2
C1
C0
Write
HVDD
CYSX8
CSAZ
CSGS
Reset
Value
0
0
0
0
Reset
Condition
POR, Reset
Mode or
ext_reset
POR
POR
POR
HVDD - Hall Sensor Supply Enable
This write-only bit enables/disables the state of the hall
sensor supply.
1 = HVDD on
0 = HVDD off
CYSX8 - Cyclic Sense Timing x 8.
This write-only bit influences the cyclic sense period as
shown in Table 23.
1 = Multiplier enabled
0 = None
CSAZ - Current Sense Auto-Zero Function Enable
This write-only bit enables/disables the circuitry to lower
the offset voltage of the current sense amplifier.
1 = Auto-zero function enabled
0 = Auto-zero function disabled
CSGS - Current Sense Amplifier Gain Select
This write-only bit selects the gain of the current sense
amplifier.
1 = 14.5 (typ.)
0 = 30 (typ.)
Analog Integrated Circuit Device Data
Freescale Semiconductor
33912
41