33912 Datasheet, PDF (24/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current

FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MC33912 - Functional Block Diagram
Integrated Supply
Hall Sensor Supply
Voltage Regulator
HVDD
VDD
Analog Circuitry
Window Watchdog
Wake-Up
Digital / Analog Input
Voltage, Current & Temperature Sense
MCU Interface and Output Control
SPI Interface
Reset & IRQ Logic
LIN Interface / Control LS/HS - PWM Control
Analog Output 0/1
High Side Drivers
HS1 - HS2
Low Side Drivers
LS1 - LS2
LIN Physical Layer
Interface
Integrated Supply
Analog Circuitry
MCU Interface and Output Control
Drivers
Figure 14. Functional Internal Block Diagram
ANALOG CIRCUITRY
The 33912 is designed to operate under automotive
operating conditions. A fully configurable window watchdog
circuit will reset the connected MCU in case of an overflow.
Two low power modes are available with several different
wake-up sources to reactivate the device. Four analog /
digital inputs can be sensed or used as the wake-up source.
The device is capable of sensing the supply voltage
(VSENSE), the internal chip temperature (CTEMP) as well as
the motor current using an external sense resistor.
HIGH SIDE DRIVERS
Two current and temperature protected High Side drivers
with PWM capability are provided to drive small loads such as
Status LED’s or small lamps. Both Drivers can be configured
for periodic sense during low power modes.
LOW SIDE DRIVERS
Two current and temperature protected Low Side drivers
with PWM capability are provided to drive H-Bridge type
relays for power motor applications
MCU INTERFACE
The 33912 is providing its control and status information
through a standard 8-Bit SPI interface. Critical system events
such as Low- or High-voltage/Temperature conditions as well
as over-current conditions in any of the driver stages can be
reported to the connected MCU via IRQ or RST. Both Low
Side and both High Side driver outputs can be controlled via
the SPI register as well as the PWMIN input. The integrated
LIN physical layer interface can be configured via SPI register
and its communication is driven through the RXD and TXD
device pins. All internal analog sources are multiplexed to the
A_DOUT 0 pin. The current sense analog signal is directly
routed through ADOUT1.
VOLTAGE REGULATOR OUTPUTS
Two independent voltage regulators are implemented on
the 33912. The VDD main regulator output is designed to
supply a MCU with a precise 5V. The switchable HVDD
output is dedicated to supply small peripherals as hall
sensors.
LIN PHYSICAL LAYER INTERFACE
The 33912 provides a LIN 2.0 compatible LIN physical
layer interface with selectable slew rate and various
diagnostic features.
33912
24
Analog Integrated Circuit Device Data
Freescale Semiconductor