33912 Datasheet, PDF (33/47 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with DC Motor Pre-driver and Current

FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
Current Limit (LIN Interrupt)
The output low side FET is protected against over-current
conditions. In case of an over-current condition (e.g. LIN bus
short to V_BAT), the transmitter will not be shut down. The bit
LINOC in the LIN Status Register (LINSR) is set.
If the LINM bit is set in the Interrupt Mask Register (IMR),
an Interrupt IRQ will be generated.
Over-temperature Shutdown (LIN Interrupt)
The output low side FET is protected against over-
temperature conditions. In case of an over-temperature
condition, the transmitter will be shut down and the LINOT bit
in the LIN Status Register (LINSR) is set.
If the LINM bit is set in the Interrupt Mask Register (IMR),
an Interrupt IRQ will be generated.
The transmitter is automatically re-enabled once the
condition is gone and TXD is high.
A read of the LIN Status Register (LINSR) with the TXD pin
high, will re-enable the transmitter.
RXD Short-circuit Detection (LIN Interrupt)
The LIN transceiver has a short-circuit detection for the
RXD output pin. In case of an short-circuit condition, either 5V
or Ground, the RXSHORT bit in the LIN Status Register
(LINSR) is set and the transmitter is shut down.
If the LINM bit is set in the Interrupt Mask Register (IMR),
an Interrupt IRQ will be generated.
The transmitter is automatically re-enabled once the
condition is gone (transition on RXD) and TXD is high.
A read of the LIN Status Register (LINSR) without the RXD
pin short-circuit condition will clear the bit RXSHORT.
TXD Dominant Detection (LIN Interrupt)
The LIN transceiver monitors the TXD input pin to detect a
stuck in dominant (0V) condition. In case of a stuck condition
(TXD pin 0V for more than 1 second (typ.)), the transmitter is
shut down and the TXDOM bit in the LIN Status Register
(LINSR) is set.
If the LINM bit is set in the IMR, an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once TXD is
high.
A read of the LIN Status Register (LINSR) with the TXD pin
at 5V will clear the bit TXDOM.
LIN Dominant Voltage Level Selection
The LIN dominant voltage level can be selected by the bit
LDVS in the LIN Control Register (LINCR).
LIN Receiver Operation Only
While in Normal Mode, the activation of the RXONLY bit
disables the LIN TXD driver. If case of a LIN error condition,
this bit is automatically set. If a low-power mode is selected
with this bit set, the LIN wake-up functionality is disabled,
then in STOP Mode, the RXD pin will reflect the state of the
LIN bus.
STOP Mode And Wake-up Feature
During Stop Mode operation, the transmitter of the
physical layer is disabled. If the LIN-PU bit was set in the Stop
Mode sequence, the internal pull-up resistor is disconnected
from VSUP and a small current source keeps the LIN pin in
the recessive state. The receiver is still active and able to
detect wake-up events on the LIN bus line.
A dominant level longer than T_PROPWL followed by a rising
edge will generate a wake-up interrupt, and will be reported
in the Interrupt Source Register (ISR). Also see Figure 11,
page 19.
SLEEP Mode And Wake-up Feature
During Sleep Mode operation, the transmitter of the
physical layer is disabled. If the LIN-PU bit was set in the
Sleep Mode sequence, the internal pull-up resistor is
disconnected from V_SUP and a small current source keeps
the LIN pin in recessive state. The receiver must be active to
detect wake-up events on the LIN bus line.
A dominant level longer than T_PROPWL followed by a rising
edge will generate a system wake-up (Reset), and will be
reported in the Interrupt Source Register (ISR). Also see
Figure 10, page 19.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33912
33