MC9328MXS Datasheet, PDF (68/74 Pages) List of Unclassifed Manufacturers – Advance Information

Functional Description and Application Information
Table 29. SSI (Port C Primary Function) Timing Parameter Table (Continued)
Ref No.
Parameter
6
STCK high to STFS (wl) high³
7
SRCK high to SRFS (wl) high³
8
STCK high to STFS (wl) low³
9
SRCK high to SRFS (wl) low³
10 STCK high to STXD valid from high impedance
11a STCK high to STXD high
11b STCK high to STXD low
12 STCK high to STXD high impedance
13 SRXD setup time before SRCK low
14 SRXD hold time after SRCK low
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum Maximum Minimum Maximum
1.48
4.45
1.3
-1.1
-1.5
-1.1
2.51
4.33
2.2
0.1
-0.8
0.1
14.25
15.73
12.5
0.91
3.08
0.8
0.57
3.19
0.5
12.88
13.57
11.3
21.1
–
18.5
0
–
0
3.9
ns
-1.5
ns
3.8
ns
-0.8
ns
13.8
ns
2.7
ns
2.8
ns
11.9
ns
–
ns
–
ns
External Clock Operation (Port C Primary Function²)
15 STCK/SRCK clock period¹
92.8
–
81.4
16 STCK/SRCK clock high period
27.1
–
40.7
17 STCK/SRCK clock low period
18 STCK high to STFS (bl) high³
19 SRCK high to SRFS (bl) high³
20 STCK high to STFS (bl) low³
21 SRCK high to SRFS (bl) low³
22 STCK high to STFS (wl) high³
23 SRCK high to SRFS (wl) high³
24 STCK high to STFS (wl) low³
25 SRCK high to SRFS (wl) low³
61.1
–
40.7
–
92.8
0
–
92.8
0
–
92.8
0
–
92.8
0
–
92.8
0
–
92.8
0
–
92.8
0
–
92.8
0
26 STCK high to STXD valid from high impedance
18.01
28.16
15.8
27a STCK high to STXD high
8.98
18.13
7.0
27b STCK high to STXD low
9.12
18.24
8.0
28 STCK high to STXD high impedance
18.47
28.5
16.2
29 SRXD setup time before SRCK low
1.14
–
1.0
30 SRXD hole time after SRCK low
0
–
0
–
ns
–
ns
–
ns
81.4
ns
81.4
ns
81.4
ns
81.4
ns
81.4
ns
81.4
ns
81.4
ns
81.4
ns
24.7
ns
15.9
ns
16.0
ns
25.0
ns
–
ns
–
ns
Synchronous Internal Clock Operation (Port C Primary Function²)
31 SRXD setup before STCK falling
32 SRXD hold after STCK falling
15.4
–
13.5
–
ns
0
–
0
–
ns
MC9328MXS Technical Data, Rev. 3
68
Freescale Semiconductor