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MC9328MXS Datasheet, PDF (58/74 Pages) List of Unclassifed Manufacturers – Advance Information
Functional Description and Application Information
Table 22. PWM Output Timing Parameter Table
Ref No.
Parameter
1 System CLK frequency1
2a Clock high time1
2b Clock low time1
3a Clock fall time1
3b Clock rise time1
4a Output delay time1
4b Output setup time1
1 CL of PWMO = 30 pF
1.8 ± 0.1 V
Minimum
0
3.3
7.5
–
–
5.7
5.7
Maximum
87
–
–
5
6.67
–
–
3.0 ± 0.3 V
Minimum
0
5/10
5/10
–
–
5
5
Maximum
100
–
–
5/10
5/10
–
–
Unit
MHz
ns
ns
ns
ns
ns
ns
4.8 SDRAM Controller
This section shows timing diagrams and parameters associated with the SDRAM (synchronous dynamic
random access memory) Controller.
MC9328MXS Technical Data, Rev. 3
58
Freescale Semiconductor