MC9328MXS Datasheet, PDF (59/74 Pages) List of Unclassifed Manufacturers – Advance Information

Functional Description and Application Information
SDCLK
CS
1
2
3S
3
3S
RAS
CAS
WE
3H
3S
3H
3H
3S
3H
ADDR
DQ
DQM
4S 4H
ROW/BA
COL/BA
8
3S
5
6
Data
7
3H
Note: CKE is high during the read/write cycle.
Figure 43. SDRAM Read Cycle Timing Diagram
Table 23. SDRAM Read Timing Parameter Table
Ref
No.
Parameter
1 SDRAM clock high-level width
2 SDRAM clock low-level width
3 SDRAM clock cycle time
3S CS, RAS, CAS, WE, DQM setup time
3H CS, RAS, CAS, WE, DQM hold time
4S Address setup time
4H Address hold time
5 SDRAM access time (CL = 3)
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum Maximum Minimum Maximum
2.67
–
4
6
–
4
11.4
–
10
3.42
–
3
2.28
–
2
3.42
–
3
2.28
–
2
–
6.84
–
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
6
ns
MC9328MXS Technical Data, Rev. 3
Freescale Semiconductor
59