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| MC9S12HZ128VAL Datasheet, PDF (502/692 Pages) Freescale Semiconductor, Inc – MC9S12HZ256 Data Sheet, Rev. 2.05 | |||
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Chapter 17 Dual Output Voltage Regulator (VREG3V3V2)
17.1.3 Block Diagram
Figure 17-1 shows the function principle of VREG3V3 by means of a block diagram. The regulator core
REG consists of two parallel sub-blocks, REG1 and REG2, providing two independent output voltages.
VDDR
VDDA
LVD
REG2
REG1
LVR
LVR
POR
VDDPLL
VSSPLL
VDD
POR
VSSA
VSS
VREGEN
CTRL
LVI
REG: Regulator Core
LVD: Low Voltage Detect
CTRL: Regulator Control
LVR: Low Voltage Reset
POR: Power-on Reset
PIN
Figure 17-1. VREG3V3 Block Diagram
MC9S12HZ256 Data Sheet, Rev. 2.05
502
Freescale Semiconductor
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