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MC9S12HZ128VAL Datasheet, PDF (365/692 Pages) Freescale Semiconductor, Inc – MC9S12HZ256 Data Sheet, Rev. 2.05 | |||
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Chapter 12 Freescaleâs Scalable Controller Area Network (MSCANV2)
Module Base + 0x0004 (DSR0)
0x0005 (DSR1)
0x0006 (DSR2)
0x0007 (DSR3)
0x0008 (DSR4)
0x0009 (DSR5)
0x000A (DSR6)
0x000B (DSR7)
7
R
DB7
W
6
DB6
5
DB5
4
DB4
3
DB3
2
DB2
1
DB1
0
DB0
Reset:
x
x
x
x
x
x
x
x
Figure 12-31. Data Segment Registers (DSR0âDSR7) â Extended Identiï¬er Mapping
Field
7:0
DB[7:0]
Table 12-32. DSR0âDSR7 Register Field Descriptions
Data bits 7:0
Description
12.3.3.3 Data Length Register (DLR)
This register keeps the data length ï¬eld of the CAN frame.
7
6
5
4
3
2
1
R
DLC3
DLC2
DLC1
W
Reset:
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 12-32. Data Length Register (DLR) â Extended Identiï¬er Mapping
0
DLC0
x
Table 12-33. DLR Register Field Descriptions
Field
3:0
DLC[3:0]
Description
Data Length Code Bits â The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 12-34 shows the effect of setting the DLC bits.
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
365
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