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MC9S12HZ128VAL Datasheet, PDF (295/692 Pages) Freescale Semiconductor, Inc – MC9S12HZ256 Data Sheet, Rev. 2.05 | |||
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10.3.2.1 Return-to-Zero Control Register (RTZCTL)
Chapter 10 Stepper Stall Detector (SSDV1)
7
6
5
4
3
2
R
0
ITG
DCOIL
RCIR
POL
SMS
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-2. Return-to-Zero Control Register (RTZCTL)
1
0
STEP
0
0
Read: anytime
Write: anytime
Table 10-3. RTZCTL Field Descriptions
Field
7
ITG
6
DCOIL
5
RCIR
4
POL
2
SMS
1:0
STEP
Description
Integration â During return to zero (RTZE = 1), one of the coils must be recirculated or non-driven determined
by the STEP ï¬eld. If the ITG bit is set, the coil is non-driven, and if the ITG bit is clear, the coil is being recirculated.
Table 10-4 shows the condition state of each transistor from Figure 10-1 based on the STEP, ITG, DCOIL and
RCIR bits.
Regardless of the RTZE bit value, if the ITG bit is set, one end of the non-driven coil connects to the (non-zero)
reference input and the other end connects to the integrator input of the sigma-delta converter. Regardless of
the RTZE bit value, if the ITG bit is clear, the non-driven coil is in a blanking state, the converter is in a reset state,
and the accumulator is initialized to zero. Table 10-5 shows the condition state of each switch from Figure 10-1
based on the ITG, STEP and POL bits.
0 Blanking
1 Integration
Drive Coil â During return to zero (RTZE=1), one of the coils must be driven determined by the STEP ï¬eld. If
the DCOIL bit is set, this coil is driven. If the DCOIL bit is clear, this coil is disconnected or drivers turned off.
Table 10-4 shows the condition state of each transistor from Figure 10-1 based on the STEP, ITG, DCOIL and
RCIR bits.
0 Disconnect Coil
1 Drive Coil
Recirculation in Blanking Mode â During return to zero (RTZE = 1), one of the coils is recirculated prior to
integration during the blanking period. This bit determines if the coil is recirculated via VDDM or via VSSM.
Table 10-4 shows the condition state of each transistor from Figure 10-1 based on the STEP, ITG, DCOIL and
RCIR bits.
0 Recirculation on the high side transistors
1 Recirculation on the low side transistors
Polarity â This bit determines which end of the non-driven coil is routed to the sigma-delta converter during
conversion or integration mode. Table 10-5 shows the condition state of each switch from Figure 10-1 based on
the ITG, STEP and POL bits.
Stepper Motor Select â This bit selects one of two possible stepper motors to be used for stall detection. See
top level chip description for the stepper motor assignments to the SSD.
0 Stepper Motor A is selected for stall detection
1 Stepper Motor B is selected for stall detection
Full Step State â This ï¬eld indicates one of the four possible full step states. Step 0 is considered the east pole
or 0° angle, step 1 is the north Pole or 90° angle, step 2 is the west pole or 180° angle, and step 3 is the south
pole or 270° angle. For each full step state, Table 10-6 shows the current through each of the two coils, and the
coil nodes that are multiplexed to the sigma-delta converter during conversion or integration mode.
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
295
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