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MC9S12HZ128VAL Datasheet, PDF (357/692 Pages) Freescale Semiconductor, Inc – MC9S12HZ256 Data Sheet, Rev. 2.05 | |||
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Chapter 12 Freescaleâs Scalable Controller Area Network (MSCANV2)
12.3.2.17 MSCAN Identiï¬er Mask Registers (CANIDMR0âCANIDMR7)
The identiï¬er mask register speciï¬es which of the corresponding bits in the identiï¬er acceptance register
are relevant for acceptance ï¬ltering. To receive standard identiï¬ers in 32 bit ï¬lter mode, it is required to
program the last three bits (AM[2:0]) in the mask registers CANIDMR1 and CANIDMR5 to âdonât care.â
To receive standard identiï¬ers in 16 bit ï¬lter mode, it is required to program the last three bits (AM[2:0])
in the mask registers CANIDMR1, CANIDMR3, CANIDMR5, and CANIDMR7 to âdonât care.â
Module Base + 0x0014 (CANIDMR0)
0x0015 (CANIDMR1)
0x0016 (CANIDMR2)
0x0017 (CANIDMR3)
R
W
Reset
7
AM7
0
6
AM6
0
R
W
Reset
7
AM7
0
6
AM6
0
R
W
Reset
7
AM7
0
6
AM6
0
R
W
Reset
7
AM7
0
6
AM6
0
5
AM5
0
5
AM5
0
5
AM5
0
5
AM5
0
4
AM4
0
4
AM4
0
4
AM4
0
4
AM4
0
3
AM3
0
3
AM3
0
3
AM3
0
3
AM3
0
2
AM2
0
2
AM2
0
2
AM2
0
2
AM2
0
1
AM1
0
1
AM1
0
1
AM1
0
1
AM1
0
0
AM0
0
0
AM0
0
0
AM0
0
0
AM0
0
Figure 12-19. MSCAN Identiï¬er Mask Registers (First Bank) â CANIDMR0âCANIDMR3
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
Field
7:0
AM[7:0]
Table 12-23. CANIDMR0âCANIDMR3 Register Field Descriptions
Description
Acceptance Mask Bits â If a particular bit in this register is cleared, this indicates that the corresponding bit in
the identiï¬er acceptance register must be the same as its identiï¬er bit before a match is detected. The message
is accepted if all such bits match. If a bit is set, it indicates that the state of the corresponding bit in the identiï¬er
acceptance register does not affect whether or not the message is accepted.
0 Match corresponding acceptance code register and identiï¬er bits
1 Ignore corresponding acceptance code register bit
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
357
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