MC9S12HZ128VAL Datasheet, PDF (39/692 Pages) Freescale Semiconductor, Inc – MC9S12HZ256 Data Sheet, Rev. 2.05

Chapter 1 MC9S12HZ256 Device Overview
1.5.6.3 PB[7:0] / FP[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins
PB7–PB0 are general-purpose input or output pins. They can be configured as frontplane segment driver
outputs FP7–FP0 of the LCD. In MCU expanded modes of operation, these pins are used for the
multiplexed external address and data bus.
1.5.6.4 PE7 / FP22 / XCLKS / NOACC — Port E I/O Pin 7
PE7 is a general-purpose input or output pin. It can be configured as frontplane segment driver output FP22
of the LCD module.
The XCLKS is an input signal which controls whether a crystal in combination with the internal Colpitts
(low power) oscillator is used or whether Pierce oscillator/external clock circuitry is used. The state of this
pin is latched at the rising edge of RESET. If the input is a logic high the EXTAL pin is configured for an
external clock drive or a Pierce Oscillator. If the input is a logic low a Colpitts oscillator circuit is
configured on EXTAL and XTAL. Because this pin is an input with a pull-down device during reset, if the
pin remains floating, the default configuration is a Colpitts oscillator circuit on EXTAL and XTAL.
EXTAL
MCU
XTAL
CDC*
C1
C2
Crystal or
ceramic resonator
V_SSPLL
* Due to the nature of a translated ground Colpitts oscillator a
DC voltage bias is applied to the crystal. Please contact
the crystal manufacturer for crystal DC.
Figure 1-10. Colpitts Oscillator Connections (PE7 = 0)
EXTAL
MCU
XTAL
R_B
R_S*
C₁
Crystal or
ceramic resonator
C₂
V_SSPLL
* Rs can be zero (shorted) when use with higher frequency crystals.
Refer to manufacturer’s data.
Figure 1-11. Pierce Oscillator Connections (PE7 = 1)
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
39