MC908JB12DWE Datasheet, PDF (44/332 Pages) Freescale Semiconductor, Inc – MC68HC908JB16 Technical Data

Memory Map
Addr.
Register Name
Bit 7
$0000
Read:
Port A Data Register
(PTA)
Write:
Reset:
PTA7
$0001
Read:
Reserved Write:
R
Reset:
$0002
Read: 0
Port C Data Register
(PTC)
Write:
Reset:
$0003
Read: 0
Port D Data Register
(PTD)
Write:
Reset:
$0004
Read:
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0*
* DDRA7 bit is reset by POR or LVI reset only.
$0005
Read:
R
Reserved Write:
Reset:
Read: 0
$0006
Data Direction Register C
(DDRC)
Write:
Reset: 0
Read: 0
$0007
Data Direction Register D
(DDRD)
Write:
Reset: 0
$0008
Read: 0
Port E Data Register
(PTE)
Write:
Reset:
Read: 0
$0009
Data Direction Register E
(DDRE)
Write:
Reset: 0
6
PTA6
R
0
0
DDRA6
0
R
0
0
0
0
0
0
0
5
PTA5
R
0
PTD5
DDRA5
0
R
0
0
DDRD5
0
0
0
0
4
3
PTA4 PTA3
Unaffected by reset
R
R
0
0
Unaffected by reset
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
R
R
0
0
0
0
DDRD4 DDRD3
0
0
PTE4 PTE3
Unaffected by reset
DDRE4 DDRE3
0
0
2
PTA2
R
0
PTD2
DDRA2
0
R
0
0
DDRD2
0
PTE2
DDRE2
0
1
PTA1
R
PTC1
PTD1
DDRA1
0
R
DDRC1
0
DDRD1
0
PTE1
DDRE1
0
Bit 0
PTA0
R
PTC0
PTD0
DDRA0
0
R
DDRC0
0
DDRD0
0
PTE0
DDRE0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 12)
Technical Data
44
Memory Map
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor