MC908JB12DWE Datasheet, PDF (142/332 Pages) Freescale Semiconductor, Inc – MC68HC908JB16 Technical Data

Timer Interface Module (TIM)
Addr.
Register Name
Bit 7
6
5
4
3
2
$0014
$0015
Timer 1 Channel 1 ^Read: _{Bit 15}
14
Register High Write:
(T1CH1H) _Reset:
Timer 1 Channel 1 ^Read: _{Bit 7}
6
Register Low Write:
(T1CH1L) _Reset:
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
Read: TOF
0
0
$0040
Timer 2 Status and Control
Register (T2SC)
Write:
0
TOIE TSTOP
TRST
PS2
Reset: 0
0
1
0
0
0
$0042
Timer 2 Counter ^{Read: Bit 15}
14
13
12
11
10
Register High Write:
(T2CNTH) _Reset:
0
0
0
0
0
0
$0043
Timer 2 Counter ^{Read: Bit 7}
6
5
4
3
2
Register Low Write:
(T2CNTL) _Reset:
0
0
0
0
0
0
Timer 2 Counter Modulo ^Read: _{Bit 15}
14
13
12
11
10
$0044
Register High Write:
(T2MODH) _Reset:
1
1
1
1
1
1
Timer 2 Counter Modulo ^Read: _{Bit 7}
6
5
4
3
2
$0045
Register Low Write:
(T2MODL) _Reset:
1
1
1
1
1
1
Timer 2 Channel 0 Status ^Read:
$0046
and Control Register Write:
(T2SC0) _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B ELS0A
0
0
$0047
Timer 2 Channel 0 ^Read: _{Bit 15}
14
Register High Write:
(T2CH0H) _Reset:
13
12
11
10
Indeterminate after reset
= Unimplemented
Figure 10-2. TIM I/O Register Summary (Sheet 2 of 3)
1
Bit 0
9
Bit 8
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
Technical Data
142
Timer Interface Module (TIM)
MC68HC908JB16 — Rev. 1.1
Freescale Semiconductor