S9S12G128F0MLL Datasheet, PDF (411/1292 Pages) Freescale Semiconductor, Inc – Reference Manual and Date Sheet

S12 Clock, Reset and Power Management Unit (S12CPMU)
generates a Clock Monitor Reset.In Full Stop Mode the external oscillator and the clock monitor are
disabled.
10.5.2.2 Computer Operating Properly Watchdog (COP) Reset
The COP (free running watchdog timer) enables the user to check that a program is running and
sequencing properly. When the COP is being used, software is responsible for keeping the COP from
timing out. If the COP times out it is an indication that the software is no longer being executed in the
intended sequence; thus COP reset is generated.
The clock source for the COP is either ACLK, IRCCLK or OSCCLK depending on the setting of the
COPOSCSEL0 and COPOSCSEL1 bit.
In Stop Mode with PSTP=1 (Pseudo Stop Mode), COPOSCSEL0=1 and COPOSCEL1=0 and PCE=1 the
COP continues to run, else the COP counter halts in Stop Mode with COPOSCSEL1 =0.
In Pseudo Stop Mode and Full Stop Mode with COPOSCSEL1=1 the COP continues to run.
Table 10-28.gives an overview of the COP condition (run, static) in Stop Mode depending on legal
configuration and status bit settings:
Table 10-28. COP condition (run, static) in Stop Mode
COPOSCSEL1 PSTP PCE
COPOSCSEL0
OSCE
1
x
x
x
x
0
1
1
1
1
0
1
1
0
0
0
1
1
0
1
0
1
0
0
x
0
1
0
1
1
0
0
1
1
1
0
0
1
0
1
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
UPOSC
x
1
x
x
x
1
1
x
0
1
1
0
0
COP counter behavior in Stop Mode
(clock source)
Run (ACLK)
Run (OSCCLK)
Static (IRCCLK)
Static (IRCCLK)
Static (IRCCLK)
Static (OSCCLK)
Static (OSCCLK)
Static (IRCCLK)
Static (IRCCLK)
Satic (OSCCLK)
Static (IRCCLK)
Static (IRCCLK)
Static (IRCCLK)
Three control bits in the CPMUCOP register allow selection of seven COP time-out periods.
When COP is enabled, the program must write $55 and $AA (in this order) to the CPMUARMCOP
register during the selected time-out period. Once this is done, the COP time-out period is restarted. If the
program fails to do this and the COP times out, a COP reset is generated. Also, if any value other than $55
or $AA is written, a COP reset is generated.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
413