S9S12G128F0MLL Datasheet, PDF (1191/1292 Pages) Freescale Semiconductor, Inc – Reference Manual and Date Sheet

Electrical Characteristics
The VDDF, VSS1 pin pair supplies the internal NVM logic.
All VDDX pins are internally connected by metal.
All VSSX pins are internally connected by metal.
VDDA, VDDX and VSSA, VSSX are connected by diodes for ESD protection.
NOTE
In the following context V_DD35 is used for either VDDA, VDDR, and
VDDX; V_SS35 is used for either VSSA and VSSX unless otherwise noted.
I_DD35 denotes the sum of the currents flowing into the VDDA, VDDX and
VDDR pins.
A.1.3 Pins
There are four groups of functional pins.
A.1.3.1 I/O Pins
The I/O pins have a level in the range of 3.13V to 5.5V. This class of pins is comprised of all port I/O pins,
the analog inputs, BKGD and the RESET pins. Some functionality may be disabled.
A.1.3.2 Analog Reference
This group consists of the VRH pin.
A.1.3.3 Oscillator
The pins EXTAL, XTAL dedicated to the oscillator have a nominal 1.8V level.
A.1.3.4 TEST
This pin is used for production testing only. The TEST pin must be tied to ground in all applications.
A.1.4 Current Injection
Power supply must maintain regulation within operating V_DD35 or V_DD range during instantaneous and
operating maximum current conditions. If positive injection current (V_in > V_DD35) is greater than I_DD35,
the injection current may flow out of V_DD35 and could result in external power supply going out of
regulation. Ensure external V_DD35 load will shunt current greater than maximum injection current. This
will be the greatest risk when the MCU is not consuming power; e.g., if no system clock is present, or if
clock rate is very low which would reduce overall power consumption.
Freescale Semiconductor
MC9S12G Family Reference Manual, Rev.1.23
1193