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MC68HC908GZ60 Datasheet, PDF (33/352 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in Figure 2-1, includes:
⢠62,078 bytes of user FLASH memory
⢠2048 bytes of random-access memory (RAM)
⢠52 bytes of user-defined vectors
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map (Figure 2-1)
and in register figures in this document, unimplemented locations are shaded.
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller (MCU) operation. In the
Figure 2-1 and in register figures in this document, reserved locations are marked with the word Reserved
or with the letter R.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000â$003F, or at
$0440â$0461. Additional I/O registers have these addresses:
⢠$FE00; SIM break status register, BSR
⢠$FE01; SIM reset status register, SRSR
⢠$FE02; reserved
⢠$FE03; SIM break flag control register, BFCR
⢠$FE04; interrupt status register 1, INT1
⢠$FE05; interrupt status register 2, INT2
⢠$FE06; interrupt status register 3, INT3
⢠$FE07; interrupt status register 4, INT4
⢠$FE08; FLASH-2 control register, FL2CR
⢠$FE09; break address register high, BRKH
⢠$FE0A; break address register low, BRKL
⢠$FE0B; break status and control register, BRKSCR
⢠$FE0C; LVI status register, LVISR
⢠$FE0D; FLASH-2 test control register, FLTCR2
⢠$FE0E; FLASH-1 test control register, FLTCR1
⢠$FF80; FLASH-1 block protect register, FL1BPR
MC68HC908GZ60 ⢠MC68HC908GZ48 ⢠MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
33
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