MC9S08SG32 Datasheet, PDF (306/328 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Appendix A Electrical Characteristics
A.9
Internal Clock Source (ICS) Characteristics
Table A-9. ICS Frequency Specifications (Temperature Range = –40 to 125°C Ambient)
Temp Rated
#C
Rating
Symbol Min Typical Max Unit
Internal reference frequency — factory
1 P ^{trimmed at V}DD ^{= 5 V and temperature =}
25°C
f_{int_ft}
—
31.25
—
kHz ♦ ♦
Internal reference frequency —
2 T _untrimmed1
3 P Internal reference frequency — trimmed
4 D Internal reference startup time
f_{int_ut}
f_{int_t}
t_irefst
25
31.25
—
36
41.66 kHz ♦ ♦
— 39.0625 kHz ♦ ♦
55
100
μs ♦ ♦
DCO output frequency range —
5 — untrimmed¹ value provided for reference:
f_{dco_ut} = 1024 x f_{int_ut}
6 D DCO output frequency range — trimmed
f_{dco_ut}
f_{dco_t}
25.6
36.86 42.66 MHz ♦ ♦
32
—
40 MHz ♦ —
32
—
36 MHz — ♦
Resolution of trimmed DCO output
7 D frequency at fixed voltage and temperature Δf_{dco_res_t}
—
(using FTRIM)
Resolution of trimmed DCO output
8 D frequency at fixed voltage and temperature Δf_{dco_res_t}
—
(not using FTRIM)
—
9
D
Total deviation of trimmed DCO output
frequency over voltage and temperature
Δf_{dco_t}
—
Total deviation of trimmed DCO output
10 D frequency over fixed voltage and
temperature range of 0°C to 70 °C
Δf_{dco_t}
—
11 D _{FLL acquisition time} ²
t_acquire
—
± 0.1
± 0.2 ♦ %f_dco ♦
± 0.2
+ 0.5
– 1.0
+ 0.5
– 1.0
± 0.5
± 0.4 ♦ %f_dco ♦
± 1.5 ♦ %f_dco —
± 3 — %f_dco ♦
± 1 ♦ %f_dco ♦
1
ms ♦ ♦
DCO output clock long term jitter (over 2
12 D _{ms interval) 3}
C_Jitter
—
0.02
0.2 ♦ %f_dco ♦
1 _{TRIM register at default value (0x80) and FTRIM control bit at default value (0x0).}
2 _{This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or}
changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as
the reference, this specification assumes it is already running.
3 _{Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBUS.}
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V_DD and V_SS and variation in crystal oscillator frequency increase the C_Jitter percentage
for a given interval.
MC9S08SG32 Data Sheet, Rev. 7
306
Freescale Semiconductor