MC9S08SG32 Datasheet, PDF (133/328 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 8 Analog-to-Digital Converter (S08ADC10V1)
ADICLK
00
01
10
11
Table 9-9. Input Clock Select
Selected Clock Source
Bus clock
Bus clock divided by 2
Alternate clock (ALTCLK)
Asynchronous clock (ADACK)
9.3.8 Pin Control 1 Register (APCTL1)
The pin control registers disable the digital interface to the associated MCU pins used as analog inputs to
reduce digital noise and improve conversion accuracy. APCTL1 controls the pins associated with channels
0–7 of the ADC module.
Some MCUs may not use all bits implemented in this register. Bits in this register that do not have
associated external analog inputs have no control function. Consult the ADC channel assignment in the
module introduction.
7
R
ADPC7
W
Reset:
0
6
ADPC6
5
ADPC5
4
ADPC4
3
ADPC3
2
ADPC2
0
0
0
0
0
Figure 9-10. Pin Control 1 Register (APCTL1)
Table 9-10. APCTL1 Register Field Descriptions
Field
7
ADPC7
6
ADPC6
5
ADPC5
4
ADPC4
3
ADPC3
2
ADPC2
Description
ADC Pin Control 7 — ADPC7 controls the pin associated with channel AD7.
0 AD7 pin I/O control enabled
1 AD7 pin I/O control disabled
ADC Pin Control 6 — ADPC6 controls the pin associated with channel AD6.
0 AD6 pin I/O control enabled
1 AD6 pin I/O control disabled
ADC Pin Control 5 — ADPC5 controls the pin associated with channel AD5.
0 AD5 pin I/O control enabled
1 AD5 pin I/O control disabled
ADC Pin Control 4 — ADPC4 controls the pin associated with channel AD4.
0 AD4 pin I/O control enabled
1 AD4 pin I/O control disabled
ADC Pin Control 3 — ADPC3 controls the pin associated with channel AD3.
0 AD3 pin I/O control enabled
1 AD3 pin I/O control disabled
ADC Pin Control 2 — ADPC2 controls the pin associated with channel AD2.
0 AD2 pin I/O control enabled
1 AD2 pin I/O control disabled
1
ADPC1
0
0
ADPC0
0
MC9S08SG32 Data Sheet, Rev. 7
Freescale Semiconductor
123