MC9S08SG32 Datasheet, PDF (108/328 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 7 Central Processor Unit (S08CPUV3)
Source
Form
RSP
RTI
RTS
SBC #opr8i
SBC opr8a
SBC opr16a
SBC oprx16,X
SBC oprx8,X
SBC ,X
SBC oprx16,SP
SBC oprx8,SP
SEC
SEI
STA opr8a
STA opr16a
STA oprx16,X
STA oprx8,X
STA ,X
STA oprx16,SP
STA oprx8,SP
STHX opr8a
STHX opr16a
STHX oprx8,SP
STOP
STX opr8a
STX opr16a
STX oprx16,X
STX oprx8,X
STX ,X
STX oprx16,SP
STX oprx8,SP
Table 7-2. Instruction Set Summary (Sheet 7 of 9)
Operation
Object Code
Affecton CCR
Cyc-by-Cyc
Details _{V 1 1 H I N Z C}
Reset Stack Pointer (Low Byte)
SPL ← $FF
INH
(High Byte Not Affected)
Return from Interrupt
SP ← (SP) + $0001; Pull (CCR)
SP ← (SP) + $0001; Pull (A)
SP ← (SP) + $0001; Pull (X)
INH
SP ← (SP) + $0001; Pull (PCH)
SP ← (SP) + $0001; Pull (PCL)
Return from Subroutine
SP ← SP + $0001; Pull (PCH)
INH
SP ← SP + $0001; Pull (PCL)
IMM
DIR
EXT
Subtract with Carry
IX2
A ← (A) – (M) – (C)
IX1
IX
SP2
SP1
Set Carry Bit
(C ← 1)
INH
Set Interrupt Mask Bit
(I ← 1)
INH
DIR
EXT
Store Accumulator in Memory
M ← (A)
IX2
IX1
IX
SP2
SP1
Store H:X (Index Reg.)
(M:M + $0001) ← (H:X)
DIR
EXT
SP1
Enable Interrupts: Stop Processing
Refer to MCU Documentation
INH
I bit ← 0; Stop Processing
DIR
EXT
Store X (Low 8 Bits of Index Register)in
IX2
Memory
IX1
M ← (X)
IX
SP2
SP1
9C
1p
–11– ––––
80
9 uuuuufppp
↕11↕ ↕↕↕↕
81
5 ufppp
A2 ii
B2 dd
C2 hh ll
D2 ee ff
E2 ff
F2
9E D2 ee ff
9E E2 ff
2 pp
3 rpp
4 prpp
4 prpp
3 rpp
3 rfp
5 pprpp
4 prpp
99
1p
9B
1p
B7 dd
C7 hh ll
D7 ee ff
E7 ff
F7
9E D7 ee ff
9E E7 ff
35 dd
96 hh ll
9E FF ff
3 wpp
4 pwpp
4 pwpp
3 wpp
2 wp
5 ppwpp
4 pwpp
4 wwpp
5 pwwpp
5 pwwpp
8E
2 fp...
BF dd
CF hh ll
DF ee ff
EF ff
FF
9E DF ee ff
9E EF ff
3 wpp
4 pwpp
4 pwpp
3 wpp
2 wp
5 ppwpp
4 pwpp
–11– ––––
↕11– –↕↕↕
–11– –––1
–11– 1–––
011– –↕↕–
011– –↕↕–
–11– 0–––
011– –↕↕–
MC9S08SG32 Data Sheet, Rev. 7
108
Freescale Semiconductor