MC9S08SG32 Datasheet, PDF (130/328 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 8 Analog-to-Digital Converter (S08ADC10V1)
Table 9-5. ADCSC2 Register Field Descriptions (continued)
Field
5
ACFE
4
ACFGT
Description
Compare Function Enable — Enables the compare function.
0 Compare function disabled
1 Compare function enabled
Compare Function Greater Than Enable — Configures the compare function to trigger when the result of the
conversion of the input being monitored is greater than or equal to the compare level. The compare function
defaults to triggering when the result of the compare of the input being monitored is less than the compare level.
0 Compare triggers when input is less than compare level
1 Compare triggers when input is greater than or equal to compare level
9.3.3 Data Result High Register (ADCRH)
In 10-bit operation, ADCRH contains the upper two bits of 10-bit conversion data. In 10-bit mode,
ADCRH is updated each time a conversion completes except when automatic compare is enabled and the
compare condition is not met. When configured for 8-bit mode, ADR[9:8] are cleared.
When automatic compare is not enabled, the value stored in ADCRH are the upper bits of the conversion
result. When automatic compare is enabled, the conversion result is manipulated as described in
Section 9.4.5, “Automatic Compare Function” prior to storage in ADCRH:ADCRL registers.
In 10-bit mode, reading ADCRH prevents the ADC from transferring subsequent conversion data into the
result registers until ADCRL is read. If ADCRL is not read until after the next conversion is completed,
the intermediate conversion data is lost. In 8-bit mode, there is no interlocking with ADCRL. If the MODE
bits are changed, any data in ADCRH becomes invalid.
7
R
0
6
5
4
3
2
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 9-5. Data Result High Register (ADCRH)
1
ADR9
0
ADR8
0
0
9.3.4 Data Result Low Register (ADCRL)
ADCRL contains the lower eight bits of a 10-bit conversion data, and all eight bits of 8-bit conversion data.
ADCRL is updated each time a conversion completes except when automatic compare is enabled and the
compare condition is not met.
When automatic compare is not enabled, the value stored in ADCRL is the lower eight bits of the
conversion result. When automatic compare is enabled, the conversion result is manipulated as described
in Section 9.4.5, “Automatic Compare Function” prior to storage in ADCRH:ADCRL registers.
In 10-bit mode, reading ADCRH prevents the ADC from transferring subsequent conversion data into the
result registers until ADCRL is read. If ADCRL is not read until the after next conversion is completed,
MC9S08SG32 Data Sheet, Rev. 7
120
Freescale Semiconductor