MC9S08SG32 Datasheet, PDF (10/328 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Section Number
Title
Page
4.5.4 Burst Program Execution.................................................................................................. 49
4.5.5 Access Errors .................................................................................................................... 51
4.5.6 FLASH Block Protection.................................................................................................. 51
4.5.7 Vector Redirection ............................................................................................................ 52
4.6 Security............................................................................................................................................ 52
4.7 FLASH Registers and Control Bits ................................................................................................. 54
4.7.1 FLASH Clock Divider Register (FCDIV) ........................................................................ 54
4.7.2 FLASH Options Register (FOPT and NVOPT)................................................................ 55
4.7.3 FLASH Configuration Register (FCNFG)........................................................................ 56
4.7.4 FLASH Protection Register (FPROT and NVPROT)....................................................... 56
4.7.5 FLASH Status Register (FSTAT)...................................................................................... 57
4.7.6 FLASH Command Register (FCMD)............................................................................... 58
Chapter 5
Resets, Interrupts, and General System Control
5.1 Introduction ..................................................................................................................................... 59
5.2 Features ........................................................................................................................................... 59
5.3 MCU Reset...................................................................................................................................... 59
5.4 Computer Operating Properly (COP) Watchdog............................................................................. 60
5.5 Interrupts ......................................................................................................................................... 61
5.5.1 Interrupt Stack Frame ....................................................................................................... 62
5.5.2 Interrupt Vectors, Sources, and Local Masks.................................................................... 63
5.6 Low-Voltage Detect (LVD) System ................................................................................................ 65
5.6.1 Power-On Reset Operation ............................................................................................... 65
5.6.2 Low-Voltage Detection (LVD) Reset Operation............................................................... 65
5.6.3 Low-Voltage Warning (LVW) Interrupt Operation........................................................... 65
5.7 Reset, Interrupt, and System Control Registers and Control Bits ................................................... 65
5.7.1 System Reset Status Register (SRS) ................................................................................. 66
5.7.2 System Background Debug Force Reset Register (SBDFR) ............................................ 67
5.7.3 System Options Register 1 (SOPT1) ................................................................................ 68
5.7.4 System Options Register 2 (SOPT2) ................................................................................ 69
5.7.5 System Device Identification Register (SDIDH, SDIDL) ................................................ 70
5.7.6 System Power Management Status and Control 1 Register (SPMSC1) ........................... 71
5.7.7 System Power Management Status and Control 2 Register (SPMSC2) ........................... 72
Chapter 6
Parallel Input/Output Control
6.1 Port Data and Data Direction .......................................................................................................... 75
6.2 Pull-up, Slew Rate, and Drive Strength........................................................................................... 76
6.3 Ganged Output ................................................................................................................................ 77
6.4 Pin Interrupts ................................................................................................................................... 78
6.4.1 Edge-Only Sensitivity ....................................................................................................... 78
MC9S08SG32 Data Sheet, Rev. 7
10
Freescale Semiconductor