K61P256M120SF3 Datasheet, PDF (12/90 Pages) Freescale Semiconductor, Inc – K61 Sub-Family Data Sheet

General
Symbol Description
Min.
Max.
Unit
I_D
Instantaneous maximum current single pin limit (applies to all
–25
25
mA
digital pins except Tamper and DDR pins)
I_{D_DDR}
Instananeous maximum current single pin limit (applies to
TBD
TBD
mA
DDR pins)
I_{D_Tamper} Instananeous maximum current single pin limit (applies to
TBD
TBD
mA
Tamper pins)
V_DDA
Analog supply voltage
V_DD – 0.3
V_DD + 0.3
V
V_{USB_DP} USB_DP input voltage
–0.3
3.63
V
V_{USB_DM} USB_DM input voltage
–0.3
3.63
V
VREGIN USB regulator input
–0.3
6.0
V
V_BAT
RTC battery supply voltage
–0.3
3.8
V
1. It applies for all port pins except Tamper pins.
2. It covers digital pins except Tamper pins and DDR pins.
3. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
5 General
5.1 AC electrical characteristics
Unless otherwise specified, propagation delays are measured from the 50% to the 50%
point, and rise and fall times are measured at the 20% and 80% points, as shown in the
following figure.
Figure 1. Input signal measurement reference
All digital I/O switching characteristics assume:
1. output pins
• have C_L=30pF loads,
• are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
• are configured for high drive strength (PORTx_PCRn[DSE]=1)
2. input pins
• have their passive filter disabled (PORTx_PCRn[PFE]=0)
K61 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
12
Preliminary
Freescale Semiconductor, Inc.