MC9RS08KA2 Datasheet, PDF (105/132 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 12 Development Support
Table 12-2. RS08 BDC Command Summary (continued)
Command
Mnemonic
Active Background
Mode/
Non-Intrusive
Coding
Structure
Description
WRITE_A
Active background
mode
48/WD/d
Write accumulator (A)
READ_CCR_PC
Active background
mode
6B/d/RD16⁽⁵⁾
Read the CCR bits z, c concatenated with
the 14-bit program counter (PC)
RD16=zc:PC
WRITE_CCR_PC
Active background
mode
4B/WD16/d⁽⁶⁾
Write the CCR bits z, c concatenated with
the 14-bit program counter (PC)
WD16=zc:PC
READ_SPC
Active background
mode
6F/d/RD16⁽⁷⁾
Read the 14-bit shadow program counter
(SPC)
RD16=0:0:SPC
Write 14-bit shadow program counter
WRITE_SPC
Active background
mode
4F/WD16/d⁽⁸⁾
(SPC)
WD16 = x:x:SPC, the two most significant
bits shown by “x” are ignored by target
1. The SYNC command is a special operation which does not have a command code.
2. 18 was HCS08 BDC command for TAGGO.
3. Each RD requires a delay between host read data byte and next read, command ends when target detects a soft-reset.
4. Each WD requires a delay between host write data byte and next byte, command ends when target detects a soft-reset.
5. HCS08 BDC had separate READ_CCR and READ_PC commands, the RS08 BDC combined this commands.
6. HCS08 BDC had separate WRITE_CCR and WRITE_PC commands, the RS08 BDC combined this commands.
7. 6F is READ_SP (read stack pointer) for HCS08 BDC.
8. 4F is WRITE_SP (write stack pointer) for HCS08 BDC.
MC9RS08KA2 Series Data Sheet, Rev. 2
Freescale Semiconductor
105