XR16C850CM-F Datasheet, PDF (9/56 Pages) Exar Corporation – 2.97V TO 5.5V UART WITH 128-BYTE FIFO

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REV. 2.3.1
XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
2.0 FUNCTIONAL DESCRIPTIONS
2.1 Host Data Bus Interface
The host interface is 8 data bits wide with 3 address lines and control signals to execute bus read and write
transactions. The 850 supports 2 types of host interfaces: Intel and PC mode. The Intel bus interface is
selected by connecting SEL to logic 1. When the SEL pin is set to a logic 1, the 850 interface is the same as
industry standard 16C550. The Intel bus interconnections are shown in Figure 3. The special PC mode is
selected when SEL is connected to logic 0. The PC mode interconnections are shown in Figure 4.
FIGURE 3. XR16C850 INTEL BUS INTERCONNECTIONS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
IOR
IOW
CS#
INT
RESET
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
IOR#
IOW #
CS2#
INT
BAUDOUT#
RCLK
VCC
CS0
CS1
SEL
TX
RX
DTR#
RTS#
CTS#
DSR#
CD#
RI#
RESET
OP1#
OP2#
IOW
IOR
AS#
GND
VCC
.
FIGURE 4. XR16C850 PC MODE INTERCONNECTIONS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A14
A15
AEN#
IOR#
IOW#
IRQn
IRQ4
IRQ3
RESET
VCC
GND
GND
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AEN
IOR#
IOW#
IRQA
IRQB
IRQC
S3
S2
S1
RESET
VCC
TX
RX
DTR#
RTS#
CTS#
DSR#
CD#
RI#
OP1#
SEL
GND
VCC
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