XR16C850CM-F Datasheet, PDF (44/56 Pages) Exar Corporation – 2.97V TO 5.5V UART WITH 128-BYTE FIFO

XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
xr
REV. 2.3.1
AC ELECTRICAL CHARACTERISTICS
TA=0^O TO 70^OC (-40^O TO +85^OC FOR INDUSTRIAL GRADE PACKAGE), VCC IS 2.97V TO 5.5V, 70 PF LOAD WHERE
APPLICABLE
SYMBOL
PARAMETER
LIMITS
3.3V
MIN
MAX
LIMITS
5.0V
MIN
MAX
UNIT
T_RD2
T_DIS
Delay from Chip Select to IOR#
Delay from IOR# to DDIS#
10
5
ns
20
10
ns
T_WR1 Delay from AS# to IOW#
10
5
ns
T_DS2 Data Setup Time (AS# used)
T_DH2 Data Hold Time (AS# used)
T_AS3 Address Setup Time (PC Mode)
T_RD3 Delay from AEN# to IOR#
T_RD4 Delay from IOR# to AEN#
T_WR2 Delay from AEN# to IOW#
T_WR3 Delay from IOW# to AEN#
T_DS3 Data Setup Time (PC Mode)
T_DH3 Data Hold Time (PC Mode)
TWDO Delay From IOW# To Output
20
15
ns
5
5
ns
10
5
ns
10
5
ns
10
5
ns
10
5
ns
5
5
ns
20
15
ns
5
5
ns
75
50
ns
TMOD Delay To Set Interrupt From MODEM Input
75
50
ns
TRSI Delay To Reset Interrupt From IOR#
75
50
ns
TSSI Delay From Stop To Set Interrupt
1
1
Bclk
TRRI Delay From IOR# To Reset Interrupt
75
50
ns
TSI Delay From Stop To Interrupt
75
50
ns
TINT Delay From Initial INT Reset To Transmit Start
8
24
8
24 Bclk
TWRI Delay From IOW# To Reset Interrupt
75
50
ns
TSSR Delay From Stop To Set RXRDY#
1
1
Bclk
TRR Delay From IOR# To Reset RXRDY#
75
50
ns
TWT Delay From IOW# To Set TXRDY#
75
50
ns
TSRT Delay From Center of Start To Reset TXRDY#
8
8
Bclk
TRST Reset Pulse Width
40
40
ns
N Baud Rate Divisor
1
2¹⁶-1
1
2¹⁶-1
-
Bclk Baud Clock
16X
Hz
44