XR16C850CM-F Datasheet, PDF (18/56 Pages) Exar Corporation – 2.97V TO 5.5V UART WITH 128-BYTE FIFO

XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
xr
REV. 2.3.1
2.14 Auto RTS (Hardware) Flow Control
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see Figure 13):
• Enable auto RTS flow control using EFR bit-6.
• The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
• Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the
RTS# pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
2.15 Auto RTS Hysteresis
The 850 has a new feature that provides flow control trigger hysteresis while it maintains compatibility to
16C650A and 16C550. With the Auto RTS function enabled, an interrupt is generated when the receive FIFO
reaches the programmed RX trigger level. The RTS# pin will not be forced to a logic 1 (RTS off), until the
receive FIFO reaches the upper limit of the hysteresis level. The RTS# pin will return to a logic 0 after the RX
FIFO is unloaded to the lower limit of the hysteresis level. Under the above described conditions, the 850 will
continue to accept data until the receive FIFO gets full. The Auto RTS function is initiated when the RTS#
output pin is asserted to a logic 0 (RTS On). For complete details, see Table 5.
TABLE 5: AUTO RTS HYSTERESIS
TRIGGER TABLE SELECTED
(SEE TABLE 10)
FCTR FCTR
BIT-1 BIT-0
TRIGGER LEVEL
(CHARACTERS)
RTS
INT PIN
RTS#
HYSTERESIS
(CHARACTERS)
ACTIVATION
DE-ASSERTED
(CHARACTERS)
RTS#
ASSERTED
(CHARACTERS)
0
0
1
-
1
4
0
0
0
4
Trigger Table-A
0
0
8
0
0
14
-
4
8
1
-
8
14
4
-
14
14
8
0
0
8
-
8
16
0
0
0
16
Trigger Table-B
0
0
24
0
0
28
-
16
24
8
-
24
28
16
-
28
28
24
0
0
8
-
8
16
0
0
0
16
Trigger Table-C
0
0
56
-
16
56
8
-
56
60
16
0
0
60
0
1
N
Trigger Table-D
1
0
N
(Programmable)
1
1
N
-
60
60
56
±4
N
N+4
N-4
±6
N
N+6
N-6
±8
N
N+8
N-8
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