XR16C850CM-F Datasheet, PDF (25/56 Pages) Exar Corporation – 2.97V TO 5.5V UART WITH 128-BYTE FIFO

xr
REV. 2.3.1
XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
3.0 UART INTERNAL REGISTERS
The 850 has a set of configuration registers selected by address lines A0, A1 and A2. The 16C550 compatible
registers can be accessed when LCR[7] = 0 and the baud rate generator divisor registers can be accessed
when LCR[7] = 1 and LCR ≠ 0xBF. The enhanced registers are accessible only when LCR = 0xBF. The
complete register set is shown on Table 7 and Table 8.
TABLE 7: XR16C850 UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
0 00
DLL - Div Latch Low Byte
Read/Write
0 01
DLM - Div Latch High Byte
Read/Write
0 00
0 01
DREV - Device Revision Code
DVID - Device Identification Code
Read-only
Read-only
0 01
IER - Interrupt Enable Register
Read/Write
0 10
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
0 11
LCR - Line Control Register
Read/Write
1 00
1 01
MCR - Modem Control Register
LSR - Line Status Register
Reserved
Read/Write
Read-only
Write-only
1 10
MSR - Modem Status Register
Reserved
Read-only
Write-only
1 11
SPR - Scratch Pad Register
Read/Write
1 11
FLVL - TX/RX FIFO Level Counter Register
Read-only
1 11
0 00
EMSR - Enhanced Mode Select Register
ENHANCED REGISTERS
TRG - TX/RX FIFO Trigger Level Reg
FC - TX/RX FIFO Level Counter Register
Write-only
Write-only
Read-only
0 01
FCTR - Feature Control Reg
Read/Write
0 10
EFR - Enhanced Function Reg
Read/Write
1 00
1 01
Xon-1 - Xon Character 1
Xon-2 - Xon Character 2
Read/Write
Read/Write
1 10
Xoff-1 - Xoff Character 1
Read/Write
1 11
Xoff-2 - Xoff Character 2
Read/Write
COMMENTS
LCR[7] = 0
LCR[7] = 1, LCR ≠ 0xBF
DLL, DLM = 0x00,
LCR[7] = 1, LCR ≠ 0xBF
LCR[7] = 0
LCR[7] = 0
LCR[7] = 0, FCTR[6] = 0
LCR[7] = 0, FCTR[6] = 1
LCR = 0xBF
25